Design
IAR Systems achieves 13% improvement on CoreMark benchmark for ARM Cortex-M0
IAR Systems today announced the latest release of its IAR Embedded Workbench for ARM. Highly optimised for code size and increased execution speed, it performs up to 13% better on CoreMark benchmarks for Cortex-M0 compared to the previous version of IAR Embedded Workbench.
It iThe IAR Embedded Workbench version 5.41 also supports code generation and debugging of ARM Cortex-R4F core with the vector floating point (VFP) coprocessor extension. Devices with a VFP unit will benefit from the compiler's VFP support, making floating point operations written in C/C++ run in fewer clock cycles, and further improving the performance of the compiled code. Other new features of this release include the ability to set start and stop trace triggers. Also, the instruction trace triggers can be started and stopped based on conditions such as specific code locations and data access. This feature is supported both by J-Trace for ARM and J-Trace for Cortex-M3 trace probes. In addition, the J-Trace for Cortex-M3 supports the use of the serial wire output (SWO) port trace.
Mats Ullström, Product Director, IAR Systems says, We are proud to present another highly competitive set of tools to the market. We were the first to offer a development kit for the Cortex-M0, and we now believe we are releasing the best compiler for the Cortex-M0.
IAR Embedded Workbench provides a completely integrated development environment including a project manager, editor, build tools and debugger. In a continuous workflow, you can create source files and projects, build applications and debug them in a simulator or on hardware.
It provides extensive support for a wide range of ARM devices, hardware debug systems and RTOSs and generates very compact and efficient code. Ready-made device configuration files, flash loaders and over 1,700 example projects are included.
IAR Embedded Workbench is compatible with other ARM EABI compliant compilers and over twelve ARM cores.