Design

DSPs targeting high-end and always-on applications

27th April 2021
Alex Lynn
0

Cadence Design Systems has expanded its popular Tensilica Vision DSP product family with the debut of two new DSP IP cores for embedded vision and AI. Packing a 3.8 tera operations per second (TOPS), the flagship Cadence Tensilica Vision Q8 DSP delivers two times performance and memory bandwidth compared to the Tensilica Vision Q7 DSP and energy efficiency for high-end vision and imaging applications in the automotive and mobile markets.

The Tensilica Vision P1 DSP is optimised for always-on and smart sensor applications in the consumer market, providing an energy-efficient solution.

There has been strong customer interest in the Vision Q8 and Vision P1 DSPs, with several evaluations underway. The new DSPs round out Cadence’s comprehensive portfolio of proven vision and AI DSPs, offering customers even greater design flexibility with best-in-class technology.

Based on the similar SIMD and VLIW architecture found in the existing Tensilica Vision DSPs, the Vision Q8 and Vision P1 DSPs feature an N-way programming model that preserves software compatibility for an easy migration from prior-generation Tensilica Vision DSPs with different SIMD widths.

Like the rest of the Tensilica Vision DSP family, the Vision Q8 and Vision P1 DSPs support Tensilica Instruction Extension (TIE) language, allowing customers to customise the instruction set. Both DSPs also support Xtensa Neural Network Compiler (XNNC) and the Android Neural Networks API (NNAPI) for neural network support. In addition, they support more than 1700 OpenCV-based vision library functions, OpenCL and the Halide compiler for computer vision and imaging applications. Both cores are automotive ready with ASIL B hardware random faults and ASIL D systematic fault certification.

The seventh-generation Tensilica Vision Q8 DSP also offers the following features and capabilities:

  • Optimised for high-end mobile and multi-camera automotive applications.
  • 1024-bit SIMD with 3.8TOPS delivers 2X performance for vision, AI and floating point and 2X memory bandwidth compared to the Vision Q7 DSP.
  • Single core simplifies system design, reducing power by up to 20%.
  • Delivers up to 4X performance improvement for non-convolution layers for AI workload.
  • Expanded instruction set provides high-level language support for OpenCL and Halide, and simplified programming model shortens time to program so code can be written once and utilised across different SIMD widths.

Tensilica Vision P1 DSP features and capabilities include:

  • Optimised for always-on applications including smart sensors, AR/VR glasses and IoT/smart home devices.
  • 128-bit SIMD with 400 giga operations per second (GOPS) offers one-third the power and area plus 20 percent higher frequency compared to the widely deployed Vision P6 DSP.
  • Architecture optimised for small memory footprint and operation in low-power mode.

“The sheer number of sensors, as well as demands for higher frames per second and resolution, are driving the need for high-performance vision and AI DSPs that support a variety of data types,” said Sanjive Agarwala, Corporate Vice President and General Manager of the IP Group at Cadence. “At the same time, the market also needs low-power vision DSPs with entry-level AI support for always-on smart sensor applications. With the introduction of the Tensilica Vision Q8 and Vision P1 DSPs, Cadence offers our customers optimal flexibility and faster time to market with a comprehensive portfolio of vision and AI DSPs from the high end to the low end.”

Mike Demler, Senior Analyst at the Linley Group, added: “The use of 3D sensors and different types of sensor technology continues to grow in the mobile, automotive and AR/VR markets. All of these markets are increasingly demanding high-performance vision and AI processing with low power for edge applications.

“To meet these requirements, SoC designers are seeking hardware IP with a range of performance points. Cadence has a proven track record of successfully delivering six generations of Tensilica Vision DSPs, and with the introduction of these two new DSPs to the lineup, Cadence remains a compelling choice for SoC designers.”

Pierre Cambou, Principal Analyst, imaging at Yole Développement, said: “As stated in our CMOS Camera Module Industry for Consumer & Automotive 2020 report, over the next five years, we expect to continue to see 20 to 30% growth in the sensing segment of the image sensor market, with the biggest growth coming from the automotive and the mobile market segments.

“Sensing applications in the mobile image sensor market are now well established for biometrics and 3D; in automotive, ADAS image sensors are becoming an increasing focus given the proliferation of more complex use cases. There is currently a need for high-performance DSPs capable of operating with a few tera operations per second (TOPS) of computing power to address upcoming consumer and ADAS Level 2+ applications. Meanwhile, new consumer use cases are driving the need for always-on operations; therefore efficiency and low power operation modes become well sought after capabilities, as illustrated in our Neuromorphic Sensing and Computing 2019 report.”

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