Design
Docea Improves Electronic Design Power Modeling with New Version of Aceplorer
Docea Power announced today that it is shipping a new version of its Aceplorer software. Aceplorer is used to model and optimize electronic design power consumption, early in the design cycle, at the architectural level.
WhatAceplorer 2.2 adds a library of generic blocks that can be used as a starting point for creating libraries of components including Intellectual Property (IP)-based power description models. Its graphical user interface (GUI), and project management capabilities have been improved so that it is easier to instantiate, aggregate and share libraries and designs among different teams.
Aceplorer 2.2 automatically outputs Unified Power Format (UPF) 2.0 or IEEE Std. 1801-2009 files to allow architects to communicate their specifications to the implementation or realization teams. This eliminates having to write the first UPF file in the flow by hand, a step that is prone to errors and tedious for system architects to perform. By automating this process, Aceplorer 2.2 helps reduce the risk of errors. An easy-to-understand UPF file editor allows for information sharing and reduces the risks of misunderstandings among different teams.
“We continue to be committed to improving the accuracy of high level, architectural solutions for analyzing the power consumption of electronics designs, at SoC and platform level,” remarked Ghislain Kaiser, CEO of Docea Power. “Our software addresses power optimization early in the design cycle where it makes the most impact.”