Lattice's Latest Design Software Enables Designers to Derive Big Benefits from Tiny FPGAs

These new releases support new additions to Lattice's ultra-low density FPGA product line that are ideal for low-power, low-cost, space-constrained systems.

These software releases will also provide access to an array of additional new Lattice products. Moreover, iCE40 FPGA designers will now have a choice of synthesis tools to help achieve their power, space, and cost objectives.

To build the lowest-power, smallest-size and lowest-cost systems, designers must continually weigh trade-offs and make crucial decisions throughout the design process, said Mike Kendrick, Director of Software Marketing at Lattice Semiconductor. We continue to expand our ultra-low density FPGA product portfolio to give designers the hardware and software resources they need to meet aggressive design goals for high- volume, low-cost applications.

More I/O in Less Space

With support from Lattice Diamond v2.2 design software, the MachXO2 4000 FPGA is now available in the compact 184-ball csBGA package, which provides up to 150 I/O in an 8 by 8-mm footprint. The low-power, instant-on, non-volatile device, with 4,320 LUTs of programmable logic, is ideal for compact, low-power image processing, video, and display applications that require high bandwidth and fast data transfers.

Compact Co-Processing Power

iCEcube2 (v2013-03) software provides access to the iCE40 LP8K FPGA in a 4 x 4-mm, 81-ball ucBGA package with a 0.4-mm pitch. This part squeezes more processing power into a 25% smaller footprint than was previously possible with other packages. Delivering 7,680 LUTs, the iCE40 LP8K FPGA enables designers to build efficient co-processors to accelerate data processing in a number of space-constrained portable industrial, scientific, and medical applications.

The Lattice iCEcube2 (v2013-03) environment supports the Lattice Synthesis Engine as well as Synopsys' Synplify Pro software. Moreover, the Lattice Synthesis Engine supports the entire ultra-low density FPGA product line. Designers can easily select which tool they would like to use, enabling access to a broader set of logic optimizations to minimize device power, size, and cost.