CEVA-BX2 audio DSP supports Dolby multistream decoder

Dolby MS12 solution that reduces the complexity of integrating multiple audio technologies into these devices.

It supports decoding of premium audio content including Dolby Atmos, which is used by many content service providers like Netflix, and Dolby AC-4 which is part of ATSC 3.0 and other next-gen audio standards around the globe.

CEVA’s optimised and approved implementation of Dolby MS12 on the CEVA-BX2 DSP will allow System-on-Chip (SoC) designers and device manufacturers the ability to incorporate Dolby technologies, including Dolby Atmos and Dolby AC-4 into their products. The powerful CEVA-BX2 DSP can also be used to run additional value-add software in the product, such as a multi-microphone voice user interface, supported by the ClearVox noise reduction and WhisPro speech recognition software packages.

Moshe Sheier, Vice President of Marketing at CEVA, said: “CEVA continues to be at the forefront of audio/voice innovation, having powered more than seven billion audio/voice devices to date. The addition of Dolby MS12 to the broad range of software packages optimised and approved for our DSPs will enable our OEM and semiconductor customers to accelerate the development of their products to support Dolby audio technologies.

“We are excited to announce this milestone and look forward to helping our mutual customers bring their smart and connected multimedia products to market and take advantage of the incredible audio experience we are enabling together.”

CEVA-BX2 is a modern, high performance audio/voice and AI capable DSP designed for intensive audio applications such as multichannel audio decode, far-field noise reduction and Artificial Intelligence based speech recognition and sound analytics.

Targeted for high performance audio devices such as Smart TVs and OTT/STB media devices, smart speakers, soundbars, and car infotainment systems, the CEVA-BX2 uses quad 32X32-bit MACs and octal 16X16-bit MACs, with enhanced capability for supporting 16x8-bit and 8x8-bit MAC operations.

Its 11-stage pipeline and five-way VLIW micro-architecture support parallel processing with dual scalar compute engines, load/store and program control that reaches a speed of 2GHz at a TSMC 7nm process node.

The CEVA-BX2 Instruction Set Architecture (ISA) incorporates support for Single Instruction Multiple Data (SIMD) as well as optional floating point units for high accuracy algorithms. The CEVA-BX2 is accompanied by a comprehensive software development tool chain, including an advanced LLVM compiler, eclipse-based debugger, DSP and neural network compute libraries, neural network frameworks support and Real Time Operating Systems (RTOS).