Carbon and Arteris Simplify SoC Optimization

Complete Hardware and Software System
The newly announced CPAK contains multiple elements to enhance designer productivity. In addition to a 100% accurate model of the Arteris FlexNoC interconnect, the CPAK also contains accurate models of the ARM Cortex-A9 processor and ARM PL310 L2 cache controller. Multiple traffic generators configured as both producers and consumers are also included to drive and receive AXI traffic.

The performance analysis kit comes complete with software to configure the components and execute system stress tests. A ported version of EEMBC’s CoreMark benchmark is also included to further exercise the system. The CPAK can be used immediately after download for architectural exploration or firmware development. Designers can also easily customize any of the supplied components to meet the specifications of their own system on chip design.

“Carbon’s performance analysis kits provide developers an ideal starting point for virtual prototype analysis,” said Kurt Shuler, vice president of marketing at Arteris. “Because of the widespread adoption of Arteris network on chip interconnect IP in mobile and consumer electronics semiconductor markets, incorporating Arteris FlexNoC IP models in Carbon’s CPAKs provides SoC architects and engineers a fast path to virtual prototype productivity.”