ASIC Prototyping System from Synplicity

26th September 2007

ES Admin

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Synplicity has announced an addition to its HAPS (High-performance ASIC Prototyping System) product family. The HAPS-51 leverages the Xilinx Virtex-5 LX330, the industry’s largest FPGA, and on-board memory to deliver faster ASIC verification. Previous HAPS systems employed daughter boards for memory access, while the new HAPS-51 uses memory located on the board and next to the FPGA device. As a result, the HAPS-51 system provides a cost-effective, high-performance prototyping solution that reduces development time for today’s challenging SoC designs. The HAPS systems are the centerpiece of Synplicity’s powerful Confirma at-speed ASIC/ASSP verification platform.

The modular and extensible architecture of the HAPS-51 system offers several beneficial features that are designed to appeal particularly to SoC designers and software developers. As with all HAPS systems, HAPS-51 utilizes the HapsTrak standard: a set of guidelines for pinout and mechanical characteristics to help ensure compatibility with previous and future generations of HAPS motherboards and daughter boards. A tight connection between the FPGA and the on-board DDR2 memory module enables flexible, high-speed memory access making the HAPS-51 a unique verification platform for all SoC designs with embedded processors and large software content. As with all HAPS-50 systems, the HAPS-51 is equipped with programmable clock generators, sophisticated monitoring and self-test features, as well as remote configuration and setup capabilities. Additionally, multiple boards can be stacked or interconnected to support virtually any size ASIC, ASSP, or SoC design.

“We have responded directly to customer requests for a HAPS platform that connects memory directly to the FPGA,” said Lars-Eric Lundgren, general manager of Synplicity Hardware Platforms Group. “The unique features in the HAPS-51 system, combined with Synplicity’s FPGA synthesis and debug software, equips design teams with an outstanding solution for verifying the functionality of today’s most advanced and challenging designs.”