ANSYS & TowerJazz Deliver Sign-Off Design Kit

Through this collaboration, ANSYS and TowerJazz have created a foundry certified power noise analysis process design kit (PDK) that includes reference flow guidelines, collateral, example test cases and flow setup guidance that will enable analogue and RF designers to produce optimised integrated circuits faster and with confidence, minimizing cost and maximizing manufacturing yield. The reference flow enables mutual customers to efficiently utilise ANSYS Totem™ and ANSYS PathFinder™ and facilitate the manufacturing of their products in accordance with TowerJazz's process requirements. These tools are essential since voltage drop and specialised reliability checks such as electromigration (EM) and electrostatic discharge (ESD) simulations cannot be performed using Layout Versus Schematic (LVS), Design Rule Check (DRC) and extracted simulation tools.

"As the mixed-signal and analogue content increase in various markets, a robust and foundry certified power noise and reliability sign-off flow becomes critical," said Aveek Sarkar, vice president of product engineering and support at Apache Design, a subsidiary of ANSYS. "By collaborating with TowerJazz, we are able to provide optimised tools and methodologies for joint customers to enable a clean design flow, higher yield and reduced field failures."

"A close collaboration between TowerJazz and Apache on custom analogue design kit development enables our customers to efficiently deliver more robust and reliable designs for next-generation electronic products," said Ori Galzur, vice president of VLSI design center at TowerJazz. "This design kit will enable our customers to use the industry's standard power, noise and reliability sign-off solution on our industry leading technology."