Altera Ships Stratix IV E FPGA Development Kit Featuring a 530K Logic Element FPGA

The Stratix IV E FPGA Development Kit is based on a high-performance, high-density Stratix IV EP4SE530 FPGA. The FPGA features 530K logic elements (LEs) and provides on average 25 percent higher performance than currently available competitive FPGAs. The performance and density advantage offered by the Stratix IV EP4SE530 FPGA enables customers using the Stratix IV E FPGA Development Kit to fit their large designs into a single device and achieve fast timing closure.



The Stratix IV E FPGA Development Kit is the first kit available to feature an FPGA interfacing with a 533-MHz DDR3 DIMM. Using this kit, customers can develop and test memory subsystems consisting of DDR3 DIMMs, QDR II+, and RLDRAM II memory interfaces.



The Stratix IV EP4SE530 FPGA is pin compatible with Stratix III FPGAs. This pin compatibility allows customers to seamlessly migrate their Stratix III FPGA design to a higher density Stratix IV E FPGA. Customers can also seamlessly convert their final Stratix IV E FPGA design to Altera's low-cost HardCopy® IV E ASIC. Upon silicon availability in 2010, customers will also be able to migrate their Stratix IV E FPGA design to a higher density EP4SE820 device, which Altera previously announced in September 2009.



The Stratix IV E FPGA Development Kit includes:



* Development board featuring a Stratix IV E EP4SE530 FPGA

* Board test system with design examples

* 2-GB DDR3 SDRAM DIMM with a 72-bit data bus

* 72-Mb QDR II+ SRAM device with a 18-bit data bus

* 576-Mb RLDRAM II CIO device with a 36-bit data bus

* CD-ROM containing design examples

* Nios® II Design Suite license

* Quartus® II Design Software, Development Kit Edition (DKE)