DAC demo for HEVC/H.265 IP core

28th May 2014

Mick Elliott

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Datasheet

Design Automation Conference debutant Allegro DVT plans to perform a live demonstration of its HEVC/H.265 encoder IP core. The demonstration will be conducted on a prototyping platform. High Efficiency Video Coding (HEVC), alias H.265, is the next generation video standard. It brings 50% bitrate savings compared to equivalent H.264/AVC encodings.

It is expected to be the mainstream video standard for the next decade, as it technically supersedes all other video formats.

The DVT HEVC/H.265 encoder IP core supports Main and Main10 profiles, up to 4K resolutions.

Allegro DVT implementation aims at providing the highest possible video quality, and really leverages the bit-rate saving potential provided by the new HEVC coding tools. With an optimized area and low power consumption, its IP is perfectly suited for high volume consumer applications, such as tablets, smartphones, digital & wearable cameras.

Allegro DVT has other deomstrtations line up at DAC including H.264 Hardware Encoding & Codec IPs, with best-in-class video quality, minimised silicon area, optimised power consumption and an ultra-low end-to-end latency; WiGig WDE Codec IP, a silicon proven Wireless Display Extension (WDE) codec for next generation 60 GHz wireless technology: IEEE 802.11 ad/WiGig; and HEVC/H.265 Compliance Streams, provide HEVC/H.265 decoder manufacturers with the perfect tool for validating their developments, and ensure compliance with this upcoming video standard.

Design Automation Congress takes place in San Francisco (June 1-5)