Design
Virtex-6 and Spartan-6 FPGA Connectivity Development Kits Include Northwest Logic DMA Engine IP
Xilinx has announced the availability of the new Xilinx® Virtex®-6 and Spartan®-6 FPGA Connectivity Development Kits that provide a comprehensive, easy-to-use, and hardware validated development environment. A key component of the new kits is the Connectivity Targeted Reference Designs that contain Northwest Logic's high-performance, scatter-gather DMA Engine IP. The Northwest Logic® DMA Engine IP, in combination with the other elements of th...
Xilinx Connectivity, Embedded, and DSP Kits Enable Increased Productivity and Innovation for System-on-Chip Designs
Xilinx has announced six new development kits as part of its Targeted Design Platforms for enabling developers to focus on innovation and differentiation when designing with FPGAs. These development platforms for the Virtex-6 and Spartan-6 families significantly shorten the time it takes to reach optimal levels of system performance, while ensuring low levels of power consumption during system-on-chip (SoC) development. The new kits target embedd...
Lauterbach TRACE32 Now Supports ARM Cortex-A5
The TRACE32 debuggers from Lauterbach, the manufacturer of microprocessor development tools, now support the new ARM Cortex-A5 processor. The Cortex-A5 micro architecture is delivered within either a single core processor or a scalable multicore processor, the Cortex-A5 MPCore™, which consists of up to four Cortex-A5 cores in a cluster. They are designed for applications that demand high performance and lower power consumption.
AppliedMicro Standardizes on Cadence Encounter Digital Implementation System
Cadence Design Systems today announced that Applied Micro Circuits Corporation has selected the Cadence® Encounter® Digital Implementation (EDI) System for its large, complex advanced-node designs. EDI System joins other multiprocessing-capable offerings in the AppliedMicro™ methodology to form a standardized design infrastructure based set of tools.
Cadence Strengthens Virtuoso Custom IC Design Leadership
Cadence Design Systems today extended its leadership position in analog and mixed-signal chip design technologies with the introduction of dramatic improvements to its leading Virtuoso IC design platform. Cadence announced powerful performance, capacity and usability enhancements in Virtuoso IC6.1.4 that reduce overall design time while ensuring high-quality production ICs.
National Instruments LabWindows/CVI 2009 Increases Developer Productivity and Application Reliability
National Instruments today announced the release of LabWindows/CVI 2009, the latest version of the ANSI C development environment for building reliable test and measurement solutions. The software delivers support for new PC technologies including the C Interface to LabVIEW FPGA, which makes it possible for LabWindows/CVI host applications to communicate with field-programmable gate array (FPGA)-based hardware, Microsoft Windows 7 and 64-bit oper...
IAR Systems claims world's first starter kit for ARM Cortex-M0
IAR Systems has announced the availability of IAR KickStart kit for NXP LPC1114. This is believed to be the world's first commercial starter kit for ARM Cortex-M0-based microcontrollers.
Agilent Technologies' New GoldenGate Release 4.4 Accelerates Advanced Node CMOS RFIC Design
Agilent has announced the release of its RFIC simulation, verification and analysis software -- GoldenGate version 4.4. This release extends Agilent's leadership in advanced node RFIC design with enhanced performance, new key stability and yield analyses, and RF extensions to mixed-signal simulation. In addition, the new release brings performance and flexibility updates to its unique wireless standards-based virtual test bench capability.
Tensilica Delivers New Design Flow Support for Synopsys' Galaxy Implementation Platform Technologies
Tensilica has announced that it now provides out-of-the-box automated design flow support for key technologies within Synopsys' Galaxy Implementation Platform, including DC Ultra RTL synthesis and IC Compiler place-and-route, for Tensilica's new Xtensa 8 and Xtensa LX3 dataplane processors (DPUs). This latest design flow provides up to 15% improvement in processor speed, area and power, in addition to faster design closure over previous Synopsys-...
Renesas Technology Releases First Product in Multimedia Solution Line of Linux Platforms for Development of Systems Incorporating SH772x Series Application Processors
Renesas Technology Europe today announced the availability of the Renesas Multimedia Solution Linux*1 platform, which enables low-cost and rapid development of systems incorporating the SH772x Series application processor for low power multimedia applications such as audio and video for portable and industrial devices. The first product in the series is the MS7724 platform for the SH7724, the newest entry in the SH772x Series. Shipments will begi...