2017 TIE+ PCB Design Simulation Contest

Coordinated by “Politehnica” University of Bucharest since 1992, the TIE contest is internationally recognized for promoting student achievements and technological advancements in computer aided design of electronic modules and printed circuit boards (PCB). A key goal of the contest is to challenge students with real-life design challenges to further prepare them to meet industry expectations for engineering graduates. TIE+ expands the PCB design portion of the contest to focus on virtual prototyping disciplines that support high-complexity PCB design.

The 2017 TIE+ contest problem required developing a simulation model to improve the signal and power integrity on electronics assemblies. Radu Voina’s winning entry used CST PCB STUDIO (CST PCBS) to simulate the power delivery network (PDN) for a GPU processing unit and two 1Gb DDR3 memory modules. With CST PCBS, Voina was able to: analyze Dynamic Voltage (IR) drop to verify compliance with the DC voltage drop target, calculate impedance vs. frequency curves, and optimize the number of decoupling capacitors needed to reach the target impedance.

“The TIE+ iniative is an excellent activity and we were proud to support it,” said Matthias Tröscher Business Development Manager, CST and member of the TIE+ Technical Committee. “Radu Voina’s simulation project was perfectly defined for all post layout analyses and his presentation was outstanding and well prepared.”

Second place went to Peter Balan from Politehnica University of Bucharest and third place to Andreas Paranici from University of Oradea. The second and third place winners will receive a free six month and three month license of CST STUDIO SUITE respectively.