Component Management

Multi-core RISC-V Vector Processor Debug at Embedded World 2022

14th June 2022
Paige West
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The SiFive Intelligence X280 is a multi-core capable RISC-V processor with vector extensions and is optimised for AI/ML compute at the edge.

In addition to ML inferencing, it is ideal for applications requiring high-throughput, single-thread performance, while under power constraints.

With its configurability, the Lauterbach multi-core debugger for 64-bit RISC-V cores offer ideal support for all multi-core/multi-cluster configurations of the SiFive X280 core, as well as for all available ISA extensions and Linux debugging. In addition, Lauterbach offers a trace extension for recording of parallel RISC-V Nexus trace. Thus, Linux-aware detailed information about the program execution is available for all cores/clusters. This allows complex runtime errors to be identified quickly and runtime optimisations to be performed easily.

See Lauterbach and SiFive demonstrate this live in the Lauterbach booth #4-210 at the embedded world 2022.

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