Understencil wiping tops Kyzen's IEMT agenda
KYZEN will present and exhibit at the 36th International Electronics Manufacturing Technology Conference (IEMT) at the Renaissance Johor Bahru Hotel in Johor, Malaysia (Nov 11-13). “Understencil Wipe Cleaning Yield Improvements” was written by KYZEN’s Mike Bixenman, D.B.A., Shea Engineering’s Chrys Shea, Vicor Corporation – VI Chip Division’s Ray Whittier, and Indium Corporation’s Brook Sandy-Smith. The findings will be presented by KYZEN Sdn Bhd’s Technical Sales Manager TC Loy.
Understencil wiping has gained increased interest over the last several years. Changes in circuit design due to miniaturized components and highly dense interconnects have increased the importance of stencil cleanliness, both inside the aperture wall and on the seating surface of the stencil.
In most stencil printing processes, dry wiping the stencil’s bottom side has been followed by vacuum assist in an effort to remove excess solder paste from aperture walls.
As stencil apertures reduce in size, more frequent wiping is needed to assure that stencils are free of the excess solder paste that hampers their process performance.
To improve print performance and better understand the behavior of flux-stencil interactions, two technology approaches are being studied with higher levels of frequency: a nanoscale flux-repellent coating and wetting the understencil wipe with a solvent-based cleaning agent.
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