Konica Minolta Accelerates Hardware Debugging with EVE’s ZEMI-3 Transaction-Level Modeling Methodology

Over the past year, Konica Minolta has deployed ZeBu to accelerate the simulation of its high-speed, high-performance large-scale integrated circuits (LSIs) used in image processing. Konica Minolta designers adopted EVE’s ZEMI-3 transaction-level modeling methodology for transaction-level verification, drastically reducing the time it spent to create custom transactors.

“It took our designers one week to set up ZeBu and ZEMI-3 and run our test suite with results exceeding 200 times acceleration over RTL simulation,” remarks Takashi Kawabe, Assistant Manager of Architecture R&D Division, System Solution Technology R&D Laboratories at Konica Minolta Technology Center, Inc.

In that case, the test suite reported by Konica-Minolta consisted of 160,000 test sets that executed at an average of 8.5 seconds each in the emulator. In the hardware description language (HDL) simulator, each test simulated in 1,700 seconds. The speed up factor of more than 200 times exceeded Konica-Minolta expectations.

Konica-Minolta also remarked about the excellent support from EVE’s team in Japan.