SyncE solutions simplify complex clock trees

SyncE compliant timing references for an entire system are generated by the 82P33714 and 82P33731 SETS. The 8T49N285, 8T49N286 and 8T49N287 UFTs are suitable for use within line cards in multi-board systems, which adapt SETS timing signals for local interfaces while preserving SyncE compliance. The SETS and UFT devices have been tested together and are proven to provide SyncE-compliant clocks.

Network synchronisation references from any source including 1PPS signals from GPS receivers are accepted by the SETS. The 82P33714 can directly time 1G PHYs, while the 82P33731 can directly time 10G PHYs.

To directly time 10G PHYs and interface up to 100G in line card applications, the UFTs deliver reliably solid jitter performance. At any loop bandwidth setting, the devices provide redundancy management, jitter attenuation and consistent phase noise performance. Each output differential pair can independently be used as LVPECL, LVDS, HCSL, or two CMOS, providing greater flexibility. Helping engineers to simplify complex clock trees, the UFT devices allow highly flexible frequency plans, including any rate conversion to unrelated output frequencies.

The flexibility and ease of programmability in which the SETS and UFTs provide allow them to be used and reused in many different clock trees, while reducing engineering effort. For a fast and easy reconfiguration of the devices, IDT's Timing Commander tool can be used.

“Our SETS and UFTs offer unique solutions for addressing increasingly complex timing challenges, including those posed by today’s stringent standards,” said Louise Gaulin, Vice President and General Manager, Network Communications Division, IDT. “Our technology delivers the performance, flexibility and ease of use that provides a path to efficiently simplify the development of clock trees while meeting the requirements of G.8262 and other standards.”