First Xilinx Virtex-6 FPGA Module with High-Performance Features Invaluable for Radar and Telemetry Applications

“This new module provides our customers with a much denser fabric for supporting complex applications,” noted Rodger Hosking, vice president of Pentek. “Aside from the performance of the Virtex-6 FPGA, and the additional logic available for custom IP installation over the previous generation, its three wideband analog inputs and two wideband analog outputs directly target a wide range of radar and telemetry applications. For larger systems, this new module is equipped with a built-in clock synthesizer and multi-channel synchronization capabilities,” he concluded.

“The logic density and substantial DSP resources of Virtex-6 FPGAs make them ideal for Pentek’s newest high-speed data converter module,” said Xilinx senior manager, Platform Solutions, Raj Seelam. “The latest Virtex family consumes 50% less power than the previous generation of Virtex FPGAs, allowing Pentek to support even the largest parts in the family. Pentek has also taken full advantage of the built-in PCIe functionality of the Virtex-6 devices, using it as the primary board interface while also providing a secondary path for user installed protocols, like Aurora, to enhance board-to-board connectivity.

Powerful Front End
The Pentek 71620 analog front end features three Texas Instruments ADS5485 200 MHz 16-bit A/Ds delivering excellent dynamic range and an input bandwidth of 350 MHz, ideal for signal intelligence, radar, beamforming and undersampling applications.

In addition, a dual channel TI DAC5688 800 MHz 16-bit D/A provides two wideband analog outputs. Built-in 2x, 4x and 8x interpolation filters and a digital upconverter translate real or complex baseband input signals to any IF center frequency up to 360 MHz, making the dual D/A extremely flexible for generating many popular communications and radar signals.

Modular Memory
Four separate DRAM banks of 256 MB each are larger than previous designs. These multiple banks offer flexibility in dedicating separate resources to I/O streams and processor requirements, eliminating the overhead associated with arbitrating for a single, shared bank.

While synchronous SDRAM offers a fast, extremely dense memory, its architecture shares a data path for reading and writing. In some applications this shared path creates a bottleneck. To address this, the 71620 can be optioned with QDRII+ SRAM offering very efficient memory with separate read and write interfaces. The QDRII+ banks are each 8 MB deep and provide an ideal memory resource for structures like data streaming FIFOs, an integral part of the board’s advanced DMA engines.

The 71620 memory architecture is modular, giving users a choice of memory types. Applications requiring deep, fast memory can choose the DDR3. Other applications requiring simultaneous read/write access can choose QDRII+. For ultimate flexibility, a mixture of both memory types is available.

Intelligent DMA Engines
With regard to DMA transfers, Pentek took a unique approach to fulfill requirements requested by customers by crafting intelligent DMA engines to identify, timestamp and define data location and length.

Typically, you give the DMA engine the destination of where you want to move the data to and the data length, commented Robert Sgandurra, product manager, Pentek. Unfortunately, in many applications such as radar, the length may not be predetermined. The unique, intelligent DMA architecture in the 71620 couples the transfer length to user supplied gate signals and handles these issues extremely well without ‘dropping data on the floor’ or the need to add extra data to make the transfer complete, he added.


In addition, the DMA engine can automatically construct metadata packets containing channel ID, a sample-accurate timestamp and data length information. This simplifies the host processor’s job of identifying and executing on the data.

In the case of multiple board systems, each 71620 can receive and lock to a front-panel system reference clock. In addition to using the reference to synchronize sample clocks for multiple A/Ds and D/As, the reference can keep the data packet header coherent across the channels of larger systems.

Fast PCI Express
The 71620 supports Gen 2 PCI Express as the primary control and data streaming interface. With lane widths up to x8, data can be moved on and off the board at rates up to 4 GB/sec. Such rates are invaluable for moving the full bandwidth, multi-channel data required in many applications. With dual XMC connectors, the 71620 can support additional protocols, like Aurora, or RapidIO on the second connector. This is ideal for applications that require high-speed, board-to-board communication paths while still maintaining the PCIe interface.

Form Factors, Software Support, Price and Delivery
The 71620 XMC module is designed for conduction cooled assemblies and PCIe versions are also available. Software support packages are available for Linux, Windows and VxWorks operating systems. In addition Pentek's GateFlow Design Kit is available for custom IP development. The 71620 is immediately available starting at $11,500 USD; delivery is 8 to 10 weeks.