MCU core features sophisticated on-chip peripherals

Even though it is binary-compatible with the industry standard Motorola 68HC11 8-bit MCU, DCD’s IP Core has an improved FAST architecture, making it approximately four times faster when compared to the original implementation. In the standard configuration, the core has integrated on-chip major peripheral functions in 68HC11A, 68HC11D and 68HC11E configurations.

The D6811E implements both an asynchronous serial communications interface and a separate synchronous serial peripheral interface. The main 16-bit, free-running timer system has three input capture lines, five output-compare lines and a real-time interrupt function. An 8-bit pulse accumulator subsystem can count external events or measure external periods.

The DF6811E MCU Core can be equipped with the ADC controller, which allows using an external ADC controller with standard ADC software. The ADC controller makes external ADCs visible as internal ADCs in original 68HC11E MCUs. The DF6811E has built-in real time, on-chip hardware debugger, DoCD, which enables easy software debugging and validation.

The DF6811E is a customisable solution, configured according to specific requirements. The package includes an automated test bench with a complete set of tests for validation at each stage of the SoC design flow.

“Our Core offers also enhanced security by implementing self-monitoring circuitry included on-chip and the computer operating properly watchdog system to protect against software failures,” explained Jacek Hanke, CEO, DCD. “An illegal opcode detection circuit provides a non-maskable interrupt if illegal opcode is detected. Two software-controlled power-saving modes - WAIT and STOP, are available to conserve additional power.”