L-band RF tuner XMC FPGA module enhances SATCOM

“Our customers benefit from this upgrade to the Jade Architecture with increased performance along with 20% lower power and 35% lower cost,” said Bob Sgandurra, Director of Product Management for Pentek. “The Navigator Design Suite also provides them with a more robust toolset and extensive library of IP resources.”

RF tuner stage

A front panel SSMC connector accepts L-Band signals between 925MHz and 2,175MHz, typically from an L-Band antenna or an LNB (low noise block). With its programmable LNA, the Maxim MAX2121 tuner directly converts these L-Band signals to IF or baseband using a broadband I/Q analogue downconverter followed by 123MHz low pass anti-aliasing filters. The two analogue tuner outputs are digitised by two Texas Instruments ADS5474 400MHz 14-bit A/D converters to capture the full 123MHz bandwidth.

For best performance, the analogue outputs of the MAX2121 can be used in the IF mode instead of the analogue baseband I+Q mode. In this case, each A/D converter digitises an IF signal and then delivers it to a DDC to produce perfectly balanced complex I+Q digital baseband samples for enhanced demodulation performance.

An additional benefit of using the IF analogue output mode is that two independent A/D and DDC channels are now available for digitising and downconverting two signals with different center frequencies and bandwidths.

Factory installed IP advances development

The Model 71891 features two Acquisition IP modules to easily capture and move data. Each module can receive data from either of the two A/Ds or a test signal generator. Each Acquisition IP module contains a powerful DDC IP core with decimation values from 2 to 64k, covering a wide range of signal bandwidths. Because of flexible input routing within the Acquisition IP modules, many different configurations can be achieved including one A/D driving both DDCs or each of the two A/Ds driving its own DDC.

The Jade architecture

The Pentek Jade architecture is based on the Xilinx Kintex UltraScale FPGA, which raises digital signal processing (DSP) performance by over 50% over the previous family, with equally impressive reductions in cost, power dissipation and weight. As the central feature of the Jade Architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data unpacking, gating, triggering and memory control.

Navigator design suite for streamlined IP development

Pentek's Navigator Design Suite includes: Navigator FDK (FPGA Design Kit) for custom IP and Navigator BSP (Board Support Package) for creating host software applications.

The Navigator FDK includes the board’s entire FPGA design as a block diagram that can be graphically edited in Xilinx's Vivado tool suite, with full source code and documentation. Developers can integrate their IP along with the factory-installed functions or use the Navigator kit to replace the IP with their own.  The Navigator FDK Library is fully AXI-4 compliant, providing a well-defined interface for developing IP or integrating IP from other sources.

Pentek's Navigator BSP provides a full suite of high-level C-callable libraries that support all features of the Model 71891 and demonstrate all of its functional modes with examples. The software package is provided with complete source code allowing the user to modify and integrate this functionality into the end application.

Navigator BSP also includes an extremely useful Signal Viewer utility that allows developers to view digitised signals from the output samples of any DDC in time and frequency domain.

Form factors and availability

The Jade Model 71891 XMC is designed for commercial, rugged or conduction cooled operating environments. It is also available packaged in several form factors, including 3U and 6U VPX (Models 54891 and 57891/58891); 3U and 6U cPCI (Models 72891/73891/74891); AMC (Model 56891); and PCIe (Model 78891).  Additional FPGA, A/D and LVDS FPGA I/O options are available. Delivery is 8 weeks ARO.