Cadence's processor selected for use in IoT WiFi chips

“With a rapid customisation of the 32-bit low power Xtensa processor, we were able to combine the control and DSP functions into one very efficient core, conserving power and area for these very space-constrained designs,” said Teo Swee Ann, CEO, Espressif Systems. “We also utilised low voltage technology, dynamic frequency and voltage scaling, and an advanced power-control algorithm to achieve standby power consumption of less than 1.0mW and 30uA RTC deep-sleep current consumption.”