SoC module achieves memory bandwidths of up to 24GByte/sec

14th August 2018

Enclustra

Mick Elliott

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The Mercury XU5 SoC module from Enclustra is a powerful all-rounder. Based on the Xilinx Zynq UltraScale+ MPSoC, it features 6 ARM cores, a Mali 400MP2 GPU, up to 10GByte of extremely fast DDR4 SDRAM, numerous standard interfaces, 178 user I/Os and up to 256,000 LUT4 equivalents.

Thanks to two independent storage channels – one on the PS and one on the PL – it achieves memory bandwidths of up to 24GByte/sec.

The module features more direct interfaces to the FPGA fabric, in addition to a Gigabit Ethernet connection as well as up to 2 GByte DDR4 SDRAM.

With dimensions of just 56 × 54 mm, it has up to 8GByte DDR4 ECC SDRAM connected directly to the processing system, 16GByte eMMC flash memory as well as various standard interfaces, such as Gigabit Ethernet, USB 3.0, a display port, SATA and SGMII. Both the processing system and the FPGA matrix boast four PCIe Gen2/3 connections.

The Xilinx Zynq UltraScale+ MPSoC is manufactured in a 16nm FinFET+ process and comes equipped with 6 ARM cores – four 64-bit ARM CortexTM- A53 with a clock rate of up to 1333 MHz as well as a 600MHz fast 32-bit ARM dual-core CortexTM-R5.

The processors are supported by a MaliTM 400MP2 GPU and a H.264/H.265 video codec (EV variants).

Enclustra offers broad design-in support for their products. With the Mercury PE1-200 baseboard, the Mercury XU5 is a powerful development and prototyping platform.

Further expansion options are provided by the LPC FMC connector on the PE1 base board, which is compatible with a wide range of plug-in cards from various manufacturers - ADCs, DACs, motor control cards and RF links are just a small selection of the possibilities on offer.

Enclustra also offers a comprehensive ecosystem for the XU5, offering all of the hardware, software and support materials required.

Detailed documentation and reference designs make it easy to get started, in addition to the user manual, user schema, a 3D-model (STEP), PCB footprint (Altium, OrCAD, PADS, EAGLE) and differential I/O length tables.

The Enclustra Build Environment can be used to compile the Enclustra SoC modules with an integrated ARM processor very smoothly. The module and base board are selected by a graphical interface.

Afterwards, the Enclustra Build Environment downloads the appropriate Bitstream, First Stage Boot Loader (FSBL) and the required source code. Finally, U-Boot, Linux and the root file system, which is based on BusyBox, are compiled.

Thanks to the family concept with compatible connectors, different types of modules can be used on the same base board.