Processor develops sophisticated ADAS applications

Developed on the same architecture as other TDA devices, the processors extend scalability from the TDA2x devices on front camera, surround view and fusion applications with the addition of smart rear camera and radar. ADAS algorithms such as lane keep assist, adaptive cruise control, traffic sign recognition, pedestrian and object detection, forward collision warning and back over prevention are supported by the TDA3x processors. A broad range of ADAS applications, including front camera, surround view, fusion, radar and smart rear camera, utilise these algorithms. Cost-sensitive NCAP programmes such as autonomous emergency braking for pedestrians and cyclists, forward collision warning and lane keep assist can be addressed using the devices. 

Bringing next-gen ADAS features to the road in more affordable cars, the TDA3x processors enable manufacturers to scale product investments to deliver a diverse portfolio of products with hardware and software compatibility. TI's fixed-and floating-point dual TMS320C66x generation of DSP cores are offered with the devices, which are based on a heterogeneous, scalable architecture. A fully programmable Vision AccelerationPac containing an EVE, a dual ARM Cortex M4, an Image Signal Processor (ISP) and a host of peripherals is also featured.

To allow manufacturers to differentiate and adapt to the fast changing needs of the market, the processors provide additional scalability across the TDA platform. Helping customers develop algorithms for designing ADAS solutions with a reduced level of investment, lower cost and faster time to market, the TI Vision SDK software libraries are available for use with the devices.

Enabling miniaturisation of ADAS cameras or radar systems, the TDA3x processor family is claimed to be the first PoP including DDR and flash memory. Both the footprint and the board complexity are reduced by the capability to mount memory and flash on top of the TDA3x package. Therefore, processing capability is increased without increasing the size of the module. Custom PoP memory for the TDA3x SoC will be provided by Micron, ISSI and Winbond.

Improved image quality is delivered without increasing the size, cost or complexity of the processors by integrating an ISP that enables raw/Bayer sensors. Full featured ISP including noise filters, colour filter array, video noise temporal filtering, exposure and white balance controls, as well as optional support for wide dynamic range and lens distortion correction are included within variants of the TDA3x processors. A range of combinations for mono, stereo and up to four camera inputs are supported by the ISP.

To meet relevant requirements of the ISO 26262 functional safety standard, the devices are being developed. Enhancing the existing TDA2x platform safety concept, the TDA3x processors leverage a wide range of diagnostics from TI’s Hercules TMS570 safety MCU family. Together, hardware, software, tools and support help customers develop systems to meet challenging functional safety requirements and achieve system level functional safety certification more efficiently.

Helping customers reduce development time and risk, TI has developed a PMIC specifically for powering the TDA3x processors. Featuring the power management functions necessary to minimise system-level power consumption, the PMIC supports the full performance range of the processors. While driving system costs down, the PMIC meets the space requirements for ADAS applications.

The TDA3x processors, which are designed for high-volume automotive manufacturers, are sampling now. Offered with a TI Vision SDK, as well as EVE and DSP libraries, the devices are available in a 15x15 and a 12x12mm PoP.