mmwave front-end chipset addresses full 5G NR FR2

The chipset comprises four highly integrated ICs and provides a complete solution to significantly reduce the number of components needed for 24 to 47GHz 5G radios.

As mmW 5G deployment accelerates globally, operators are facing greater pressure to reduce rollout costs while expanding their network footprint with more energy efficient, lightweight, and reliable radios.

This requires highly linear, compact, and power efficient wideband products that allow design reuse over multiple bands without compromising on quality and performance.

The ADI mmW 5G front-end chipset allows OEMs to depart from the narrowband paradigm where competing solutions have traded-off design execution difficulty and radio frequency (RF) performance for bandwidth, while also outsourcing critical pieces of intellectual property such as packaging, test, and thermal modelling.

The new chipset comprises two single channel (1T1R) up/downconverters (UDCs) and two dual polarisation 16-channel beamformer devices on an advanced CMOS process. The power efficiency and linear output power provided by the beamformers enable size, weight, power, and cost reduction in mmW phased array designs compared to competing solutions.

Full-band UDCs with high drive level eliminate the need for frequency band variants and absorb driver stages for bill of materials savings.

The chipset also enables seamless operation of phased array calibration functions online in the field in addition to factory non-volatile memory (NVM) through patented IP.

This allows OEMs to move beyond the constraints of legacy NVM-only designs limited to one-time factory calibration of the beamformer, which does not address non-idealities external to the ICs and results in sub-optimal calibration results.