Application Notes
Using the TMX320VC5510 APLL
Texas Instruments
Published : 20 Nov 01
Description
Certain revisions of the prototype TMX320VC5510 DSP (hereafter referred to as VC5510) support an analog phase-locked loop (APLL) clock generator. This document provides a description of the programming and use of this APLL including the control register description how to program the APLL for the desired clock frequency and how to determine through software whether the device contains a digit
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