Application Notes
TMS320C64x DSP Host Port Interface (HPI) Performance
Texas Instruments
Published : 24 Oct 03
Description
This application report describes the number of CPU cycles required to perform a given host port interface (HPI) data transfer based on a variety of permutations of burst length CPU speed EMIF speed etc.
The HPI provides direct connectivity between a host processor and a CPU?s memory space via a 32/16-bit parallel port. The HPI throughput between a host processor and the TMS320C64x™ DSP
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