Power management system requirements

But the control of inrush current may not be enough to ensure system reliability. PLC boards contain complex ICs that require voltage and reset sequencing to ensure reliable operation. ASICs, CPUs, Flash memory and interface data buses rely on sequencing that must be coordinated according to the specifications on their data sheets and account for the delays that are inherent on board interfaces. This requires the addition of sequencer ICs that can use either an open or closed loop control of power supplies when releasing enables.

Designers often choose open loop sequencers because they can greatly simplify the design; are inexpensive, and meet minimum system requirements. Open loop sequencers are based on timers for sequencing the enables, resets and the delays. When using an open loop sequencer, an assumption is made that once a supply is initialised the voltage will rise to the system tolerance levels. If a voltage fails to initialise, the sequencer in an open loop system will proceed to enable the next supply and then release the system resets until the system hangs from the missing voltage. Voltage monitors that issue resets are added but often do not monitor all voltages or have sufficient accuracy. Closed loop sequencers provide a higher degree of system reliability, since they monitor each voltage and will not enable the next power supply until the previous supply is within the correct limits. This ensures that the individual ICs have their supplies brought up in the proper order and are within limits before initialising system resets.

The reliability of a PLC card can be greatly increased if it is designed so that it can recover from an extraction from the system as well as insertion. This requires that the resets and supplies be sequenced off when shutting down the system. Failing to sequence the board’s resets and power down can result in Flash corruption, requiring a hard reset or reprogramming before the next insertion. Microprocessor-based systems are notorious for hanging due to erroneous code processed during an under voltage condition. Resets should be issued as soon as possible (50µs or less) in a low voltage condition to minimize the amount of corrupted Flash memory.

If this abstract has piqued your interest, read the full article online in the August issue of Electronic Specifier Design, by clicking here.