Power
A system approach to power management
Many approaches to power management sacrifice speed, cost or overall reliability. They impede the design process by requiring the consideration of hundreds of parts from different vendors, require the writing of microprocessor code and, if any hardware and timing changes need to be implemented, the board will require a respin.
UsinThe Lattice Semiconductor Power Manager II family provides just such an integrated power management solution and is well suited for PLC applications. The Power Manager II’s programmable CPLD core, internal clock, precision reference, programmable analogue interfaces, MOSFET drivers and assignable digital I/Os overcome all the system issues associated with other power management designs. These devices allow each design to have a customised solution that addresses all power management issues, and can be reprogrammed easily for additional applications or tweaked to optimise board timing. They offer an integrated approach that greatly reduces design time and can be fully simulated, eliminating board changes.
The POWR607 device is well suited for PLC designs, as it is cost effective yet still integrates all the required functionality, including the hot-swap controller, allowing system response times of less than 50µs. The Power Manager II family is easily programmed using Lattice’s free PAC Designer software. Free reference designs and the software GUI make the Power Manager II products simple to implement for a wide variety of applications. The software allows designs to be debugged and simulated, verifying timing of all I/Os and sequencing before committing to hardware, eliminating the need for costly board changes.
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If this abstract has piqued your interest, read the full article online in the August issue of Electronic Specifier Design, by clicking here.