Power

A holistic approach pays off

6th January 2016
Joe Bush
0

Arthur Schaldenbrand, Cadence Design Systems, discusses some of the power design challenges that have emerged over recent years as well as some promising new technologies to address them.

Power management design is certainly not the same as it was ten years ago. Applications have evolved and as such, new design challenges have emerged. A decade ago, you might have been focused on developing a chip to manage power in a cellphone. Now, you could be designing power supplies for cars, with a whole new set of considerations.

Challenges

Revenue opportunities clearly lie in selling products versus simply selling chips. As a result, many IC designers are moving from chip-centric operations to product-centric operations, developing solutions such as power supplies for the thriving electronics market. Right from the start though, this change in focus creates some key differences.

When you’re designing a microprocessor, the power related challenges are centred on addressing concerns like leakage and maintaining low power as the circuit operates. However, when it comes to power management design, where the devices must handle large voltages and currents, you must strike a balance between maintaining high efficiency and controlling thermal and reliability issues. (Figure 1 (above) is an illustration of voltage drop and current density on a top level metallisation layer of a power transistor). Yet, analysing performance while optimising cost in power device designs isn’t easy.

Reliability, especially with end applications like automotive or medical, has become a key consideration. Reliability is exponentially related to temperature, but as the system heats up, not everything heats up at the same rate, creating mechanical stress. This condition is particularly evident for automotive applications.

Stresses on power devices are much higher than in typical chips due to the higher currents and voltages. Again, the end application influences how critical this is. A power management device for a cellphone might require just a few safe operating area checks. However, a device for a car might need hundreds of such checks because the operating and environmental conditions are more challenging.

Designers, as a result, need to take a more holistic approach when thinking about power management and device design. In addition to electrical circuit design, it’s critical to consider thermal and mechanical effects and, really, the entire system, from chip to board to package.

New device structures

New techniques and technologies have emerged to address some of the challenges of power management design. Structures like insulated gate bipolar transistors (IGBTs) are now more widely used in power system design. IGBT devices bring together the high input impedance and high switching speeds of a MOSFET with the low saturation voltage of a bipolar transistor. They can switch large currents with nearly no drive current required. New materials, such as gallium nitride and silicon carbide, are also starting to enter volume production.

In order to evaluate operation in extreme conditions, new kinds of predictive device models are needed. This approach parallels what’s happening at advanced nodes, where traditional structures are no longer sufficient for new requirements and challenges. The problem, however, is that good device models or tools for extracting the layout parasitic effects don’t exist for these new structures and materials, making simulation impossible. As a result, designers end up building prototypes. Although the components themselves typically aren’t very complex, prototyping can become a bottleneck in the process because multiple components need to be included.

New evaluation techniques

For package level effects, tools like Cadence’s Sigrity product line can perform power and thermal analysis and evaluate the effects of packaging on performance. Tools such as Cadence’s Voltus-Fi Custom Power Integrity Solution can evaluate transistor level electromigration and IR-drop with SPICE-level accuracy. Technologies like adaptive resistance meshing, via meshing and wide MOS transistor splitting (Figure 2 - below), available in tools like Cadence’s Quantus QRC Extraction Solution, can provide the extraction accuracy needed for PowerMOS transistors.

There is also work underway that can potentially lead to tools to help power designers get performance results earlier on in the process, without having to build prototypes.

Finally, there is a migration in the industry from analogue to digital control of power management. This shift enables designers to create custom transfer functions to provide faster response to load transients. However, they also need to adopt digital verification methodologies, rather than using SPICE for verification.

Summary

Designing today’s power management circuits is no longer just about developing the power transistor. Given the operating conditions and other requirements of the end applications, as well as challenges created by new structures and materials, the entire system must now be considered. Taking such a holistic view can lead to better performing, more reliable products.

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