Pending

White paper - Forecasted impact of FD SOI technology on design

9th July 2010
ES Admin
0
As potential users of Fully Depleted Silicon-on-Insulator (FD-SOI) technology for the 22nm/20nm CMOS node and beyond realize its many interests, the question of its impact on design practices arises. Although FD-SOI for next generation technology nodes is not on commercial offer yet, it is nevertheless important to bring early answers or indications to that question. This document therefore proposes a synthesis of what is known or can be reasonably expected from FD-SOI from a design perspective, and indicates some interesting new potentialities that designers may be able to exploit.
As potential users of Fully Depleted Silicon-on-Insulator (FD-SOI) technology for the 22nm/20nm CMOS node and beyond realize its many interests, the question of its impact on design practices arises. Although FD-SOI for next generation technology nodes is not on commercial offer yet, it is nevertheless important to bring early answers or indications to that question. This document therefore proposes a synthesis of what is known or can be reasonably expected from FD-SOI from a design perspective, and indicates some interesting new potentialities that designers may be able to exploit.

Featured products

Upcoming Events

View all events
Newsletter
Latest global electronics news
© Copyright 2024 Electronic Specifier