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Texas Instruments digital signal processor integrates three 1 GHz cores on a single chip

14th October 2008
ES Admin
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Designers today that must integrate multiple digital signal processors (DSPs) on a board in order to handle performance-hungry tasks, such as simultaneously processing on multiple channels or executing multiple software applications concurrently, can now realize significant cost, power and board space savings with a new high performance multicore DSP from Texas Instruments Incorporated (TI) (NYSE: TXN). The TMS320C6474 integrates three of TI's industry-leading TMS320C64x+ cores running at 1 GHz each on a single die, delivering 3 GHz of raw DSP performance that consumes 1/3 less power at 2/3 less DSP cost over discrete processing solutions. The C6474 provides significant system integration for customers currently utilizing DSP farms for communications infrastructure, medical imaging, military communications and industrial vision inspection end equipments and markets.

The C6474 integrates three C64x+ cores running at 1 GHz each on a single die to deliver 3 GHz of raw DSP performance, or 24,000 MMACS (16-bit) or 48,000 MMACS (8-bit) of measured performance. In addition to the very high performance offered by the device, design teams with existing multi-chip system solutions can immediately reap the cost, power and space benefits of the C6474 because it is 100 percent code compatible with TI's single core DSPs based on the C64x+ core (e.g. TMS320C6452, TMS320C6455), as well as those based on the predecessor TMS320C64x™ core, such as TMS320C641x devices.



The C6474 achieves this system integration due in part to a process shrink to 65nm feature size, which means the C6474 can be packaged in a 23 mm x 23 mm ball grid array (BGA) and is comparable in size to TI’s existing single core DSP solutions fabricated in 90 nm technology.



The advantages of C6474-based solutions are particularly evident for design teams struggling with stringent power budgets. To meet a 25 watt (W) budget, for example, designers would be limited to eight 1 GHz TMS320C6455 single core DSPs, each consuming around 3W. Total raw performance for this system would be 8 GHz. On the other hand, a C6474-based system would be comprised of only four chips, each consuming around 6W, but delivering a total 12 GHz of raw power because each processor includes three 1 GHz cores. The result is a 50 percent gain in raw performance per watt. Customers can also reap a considerable cost savings with solutions utilizing the C6474 because it is comparably priced to the C6455, but it delivers three times the raw DSP processing performance.



In addition, the C6474 includes TI's SmartReflex™ technologies, which leverage TI’s deep sub-micron process geometries to significantly reduce chip-level current leakage. The technologies incorporate a broad range of intelligent and adaptive hardware and software features that dynamically control voltage, frequency and power based on device activity, modes of operation, and process and temperature variation.



High performance processors require high performance peripherals so the C6474 integrates both Viterbi and Turbo accelerators to maximize processing efficiency of these frequently used algorithms. Additionally, the processor includes several serializer/deserializer (SERDES) interfaces, such as an SGMII Ethernet MAC (EMAC), an Antenna Interface (AIF) and Serial RapidIO (SRIO). The peripherals and processor cores are complemented by 32 kB of both L1 program and L1 data memory per core, 3 MB of total L2 memory available in two configurations (a 1 MB/core or a 1.5 MB / 1 MB / 0.5 MB configuration), as well as TI’s fastest DDR2 memory interface running at 667 MHz.



TI’s PTH08T240F non-isolated DC/DC power module meets the C6474 core voltage tolerance requirements, while significantly reducing the amount of external output capacitance to only 3,000 µF and is compatible with TI’s SmartReflex technologies. This allows C6474 designers to simplify their power system designs and achieve optimal power performance and efficiency.



A software debug platform is also available to assist customers developing on the C6474. The C6474 evaluation module (EVM) includes two C6474 processors, a high-speed DSP interconnect enabled by EMAC, AIF and SRIO SERDES interfaces, and design files such as Orcad and Gerber. The C6474 EVM also comes with an onboard JTAG header with a XDS560 emulator, as well as a board specific Code Composer Studio™ (CCStudio) Integrated Development Environment (IDE).



Additionally, VirtualLogix is offering VLX for the C6474. VLX Real-Time Virtualization™ software allows TI’s DSP-based platforms to simultaneously run TI’s DSP/BIOS kernel for the execution of traditional DSP tasks, side by side with VirtualLogix Linux™, allowing the quick adoption and integration of general purpose, advanced networking or control functionality without the need to add a dedicated processor.



“TI’s C6474 ecosystem represents a major milestone for developers of DSP-based products,” said Dave Beal, Director Product Management, VirtualLogix. “With VLX, a single DSP efficiently supports a variety of tasks that formerly would have required both dedicated DSPs and a general purpose processor, allowing product differentiation to be built through the DSP/BIOS kernel and Linux software, rather than dedicated hardware components. This approach results in cost, power and space savings combined with an unmatched ability for a single DSP-based platform to meet the needs of many different product lines.”

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