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MAX3679A - Quad-output clock generator provides an ultra-low-jitter timing solution for Ethernet equipment

12th April 2010

Maxim Integrated

ES Admin

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Maxim introduced the MAX3679A, a high-performance, quad-output clock generator for Ethernet equipment. This device utilizes a low-noise VCO and PLL architecture to generate a high-frequency, ultra-low-jitter (0.36psRMS, typ) clock signal from a low-frequency crystal or reference clock input. Whereas conventional solutions require an expensive crystal oscillator and fanout buffer to distribute multiple low-jitter, high-frequency clock signals, the MAX3679A only requires a packaged, AT-cut fundamental crystal. This device reduces the space and cost of the total clock-distribution solution, making it ideal for Ethernet switches/routers and other applications that require Ethernet frequencies.

To further reduce overall BOM, the MAX3679A provides four outputs from two output divider banks: one bank provides two LVPECL outputs up to 320MHz; the other bank provides one LVPECL output up to 320MHz and one LVCMOS output up to 160MHz. The output dividers are programmable, allowing designers to set the outputs to the frequencies required by their applications.

The MAX3679A provides excellent power-supply noise rejection (-59dBc) to minimize jitter degradation and ease design in noisy system environments. This device is fully specified over the -40 degrees Celsius to +85 degrees Celsius extended industrial temperature range, and operates from 3.3V ±5%. It is available in a small, 5mm x 5mm, lead-free, 32-pin TQFN package. Prices start at $7.35 (1000-up, FOB USA). An evaluation kit is available to speed design.