Inphi JEDEC-Compliant Memory Buffer Completes Next Level of Intel Validation

“Inphi is proud to have its memory buffer accomplish this milestone on the Romley-EP system,” said Paul Washkewicz, Vice President of Marketing, Computing and Storage at Inphi. “We appreciate Intel’s continued support as we managed this product development. We look forward to having our customers now complete the DIMM level qualification and ultimately bring LRDIMMs to market.”

The iMB passed a rigorous component validation phase at Intel across a matrix of frequency, voltage, capacity and DIMM configurations. Inphi’s iMB also met the required power consumption profile for thermal management. The objective of the Intel validation program for LRDIMMs is to verify compliance to the Intel specifications and to provide a guideline for memory compatibility with Intel chipsets.

Immediate Availability of iMB

In addition, Inphi also announced today the production availability of the iMB02-GS02A to support ramp to mass production of its customers’ LRDIMMs. Fully compliant with the proposed memory buffer specification as defined by JEDEC Solid State Technology Association, the global leader in developing standards for the microelectronics industry, the iMB02-GS02A is compatible with the current generation of DDR3-based server systems and helps to facilitate a transition to LRDIMMs. Unlike traditional registered DIMMs that limit the amount of server memory that can be installed due to their loading profile, LRDIMMs replace the register with an isolation memory buffer to reduce the load. The new architecture enables more ranks of DRAM to be populated on the memory module and more modules to be used in a system for higher capacity and performance scaling.