EU Consortium is accepting design proposals

Coordinated by the EU’s four leading research and technology organisations (RTOs), France’s CEA-Leti, Germany’s Fraunhofer-Gesellschaft, Belgium-headquartered imec, and Finland’s VTT, the PREVAIL project is a networked, multi-hub platform providing prototype chip fabrication capability in advanced artificial technology to EU stakeholders.

In most cases, the technology offer will be based on commercial foundry processes, and advanced technology modules will be enhanced in the cleanrooms of the project partners.

“The PREVAIL project’s ultimate goal is to position Europe with an easy-access, advanced manufacturing infrastructure enabling users to make early research samples of innovative and trustworthy products and accelerate their commercialisation,” said Sergio Nicoletti, CEA-Leti Business Development Manager and PREVAIL Project Manager. “And while bringing their cutting-edge technologies to a higher maturity level and giving users the possibility to fabricate and test AI prototypes based on these technologies, the RTOs are reaping the benefits of technological cross-fertilisation.”

“In addition to providing high-performance, low-power edge components and technologies to support the massive data-processing requirements of AI, the project will help energise the EU’s digital transformation, a precursor to the goals of the European Chips Act,” he said.

Launched at the end of 2022, the project is leveraging the RTOs’ advanced 300 mm fabrication, design and test facilities and related expertise to create the Testing and Experimentation Facility for Edge-AI Hardware (TEF Edge AI HW). This network will validate new high-performance, low-power, Edge-AI components and support an infrastructure capable of fabricating early research prototype samples for testing in innovative Edge-AI applications.

Nicoletti said the consortium is working with selected SMEs, the RTOs’ industrial partners and academic labs to prepare early designs that will be used to test fabrication equipment in the RTOs’ facilities. The project plans to open access widely for EU designers by May 2026.

While 80% of the project’s budget targets equipment suited for design, testing, and fabrication of Edge-AI devices, the project also will dramatically reinforce the readiness of the RTOs to equip their new pilot lines for developing 3D technologies, which also are envisioned in the chips act.

Key project components

In addition to fabricating advanced Edge-AI applications and creating the platform’s TEF Edge AI HW, the consortium will provide process design kits (PDKs) compatible with standard commercial CAD tools and all the elements necessary for full chip design. A user-interface team will manage relationships among the developers of next-generation, Edge-AI solutions, and the consortium.

PREVAIL is the EU’s first step to link the RTO’s different infrastructures and synchronise and coordinate their investments to minimise duplication, and to jointly increase the technology readiness levels (TRLs) of tools in development. The nearly €156 million ($169.3 million) cost of the 42-month project will be shared by the RTOs’ countries and the European Commission. Approximately 80% of this funding is CAPEX invested in new tools suited for edge-AI devices.

PREVAIL’s founding members

CEA: the French research organisation in energy, defence and security, information technologies, and health technologies is coordinator of the project.

CEA-Leti: the consortium is managed by CEA-Leti, which has about 11,000m2 of cleanroom space and 300mm fabrication capabilities equipped with more than 150 tools to prototype advanced hardware. This specialty is supported by a nano-characterisation platform specialising in physical-chemical characterisation techniques.

Fraunhofer-Gesellschaft: four Fraunhofer units in the Fraunhofer Group for Microelectronics are participating in the initial phase of the PREVAIL project: Fraunhofer IPMS’s Centre Nanoelectronic Technologies (CNT), and Fraunhofer IZM-ASSID, the Centre All Silicon System Integration Dresden, which will contribute with their 300mm fabrication lines for CMOS compatible nanoelectronic technologies and advanced 3D wafer-level system integration. Fraunhofer EMFT will contribute chip-to-foil integration and physical analysis for trust, and Fraunhofer IIS will contribute by designing, measuring, and testing CMOS integrated circuits enabled by its design and test experience in advanced semiconductor technologies down to 22nm.

Imec: with about 12,000m2 of cleanroom space, including a fully equipped 300mm infrastructure, imec provides R&D on next-generation technology nodes serving the entire semiconductor ecosystem. The institute is applying its memory, 3D and photonics departments, and unit process module department to help define PREVAIL’s technical offering.

VTT Technical Research Centre of Finland Ltd operates in several research fields. Its Microelectronics and Quantum Technology Division and the Safe and Connected Society unit are participating in the consortium’s work. With deep system and connectivity expertise, VTT enables the consortium to renew the connectivity testbed with the latest Edge-Computing development equipment tools and 5G evolution network technology updates.