FPGA debug and test system all set for Embedded World

7th January 2015

Mick Elliott

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JTAG Technologies will showcase its CoreCommander and JTAG Translator for FPGAs at the Embedded World 2015 exhibition in Nuremberg (Feb 24-26). It features direct access to memory and peripheral controllers in FPGAs for testing, debugging and in-system programming. It will read data from, write data to memory and peripherals without software programming and offers at-speed execution of read and write cycles.

It enables testing and debugging of the connections between an FPGA and memory and peripherals with at-speed bus cycles without software programming and allows easy programming of flash memory without software programming.

JTAG Translator is an IP[1] module from JTAG Technologies that provides a JTAG interface to the internal IP connection bus of an FPGA to which peripherals / peripheral controllers are connected. JTAG Translator is operated through a dedicated CoreCommander that can be used with JTAGLive and ProVision as well as with all our production packages. CoreCommander provides high-level functions to write data to and read data from memory and I/O addresses without software programming. CoreCommander functions are applied via the JTAG interface. The JTAG Translator IP module can be loaded in the FPGA for test configurations only, or it can be included as standard in functional designs.

With JTAG Translator the IP blocks which are already used in a design can be re-used for test or in-system programming purposes. Examples of existing IP blocks are interface controllers for SDR, DDR, Ethernet Mac, USB, UART, I2C, CAN, etc. These are readily available from different IP suppliers like Altera, Xilinx, OpenCores, etc.

CoreCommander is used in design debug, manufacturing test and (field) service for many different applications such as:

Checking the connections between an FPGA and memory or I/O devices by writing data to and reading data back from these devices via the memory and peripheral controllers in the FPGA.
Determining the right settings for the peripheral controller (DDR controller, flash memory controller, I/O controller) in combination with your particular memory or peripheral device. Write settings into the controller registers and verify whether proper access to memory or I/O is possible with those settings.
Programming board (serial nr) specific data such as calibration values, a mac address or a timestamp in flash memory, or program an entire flash.