Analysis
Xilinx FPGA Development Platform Enables Broadcast Equipment Makers to Meet Real-Time 3D TV Bandwidth and Processing Demands
Xilinx, Inc. (Nasdaq: XLNX) today announced at the IBC2010 conference a new development platform for engineers working to meet the rapidly growing demand for 3D TV broadcast and other high definition video applications. The Xilinx(R) Spartan(R)-6 FPGA Broadcast Connectivity Kit and Broadcast Processing Engine IP core enable broadcast system designers to build full systems for driving the high-speed transmission and real-time processing of video in a full range of professional broadcast applications including cameras, switchers, routers, encoders, monitors and cinema projectors. The low-cost Field Programmable Gate Array (FPGA) implementation of Triple-rate SDI (SD, HD, 3G) and other interfaces along with real-time video processing gives designers the ability to stay focused on product differentiation throughout the design cycle and into production in the face of constantly evolving standards and demands on performance.
WithFPGAs are increasingly being used over Applications Specific Integrated Circuits (ASICs) and Application Specific Standard Parts (ASSPs) by broadcast equipment manufacturers due to rapidly emerging standards and competition to meet requirements for video acquisition, contribution across the broadcast infrastructure, distribution to the home, and finally to consumers' 3D and 4Kx2K displays. With sales to the broadcast segment more than doubling year-on-year, Xilinx is experiencing an accelerated uptick in customer demand driven by the industry's realization that programmable chips allow OEMs to quickly update their designs with in-field reconfigurability, reducing time-to-market and overall system costs.
We saw explosive growth in demand from consumers and broadcasters to move into 3D TV this year in time for the FIFA World Cup, said Marco Lopez, Senior Vice President for Miranda Technologies. By basing our 3D TV video processor on proven FPGA technology, we were able to meet that demand and ship cutting edge signal processing equipment in time to serve our customers.
Spartan-6 FPGA Broadcast Connectivity Kit
Developed with Xilinx Alliance Program member Tokyo Electron Devices, the new kit is a comprehensive Broadcast Targeted Design Platform supporting the development of systems using the Spartan(R)-6 family of low-cost FPGAs. By providing triple-rate Serial Digital Interface (SDI), HDMI(TM) (High-Definition Media Interface), DisplayPort, DVI and V-by-One(R) HS standards, designers can use the kit to evaluate and incorporate into their designs a variety of pre-defined video interfaces used across the professional broadcast market.
Integrating multiple interfaces into a flexible, single chip FPGA design and bridging between the different standards used for uncompressed video and new display technologies allows for a reduced bill-of-materials in the final end system. Xilinx has successfully delivered SDI development platforms over the past decade to dramatically reduce the cost per channel required to bring in uncompressed video, perform video processing and switching, and transmit to video displays or storage. The anticipated widespread adoption of 3D TV will double the bandwidth requirements as compared with 1080p60 formats, thus increasing the number of SDI ports required in each system implementation or increasing the speed of these ports to 6 Gbps and beyond. The Broadcast Connectivity kits will also accommodate the higher speeds required by 3D, Digital Cinema and Ultra HDTV (6G-SDI, 10G-SDI and 12G-SDI) in the future.
Being able to bridge between all these standards makes for a very useful platform when developing next generation designs, said Yasuo Hatsumi, assistant general manager, PLD Division at Tokyo Electron Devices. The Spartan-6 FPGA Broadcast Connectivity Kit enables designers and OEMs to quickly evaluate and implement these standards so that they can concentrate on the value-add portions of their designs.
Xilinx Broadcast Processing Engine
The Xilinx Broadcast Processing Engine IP core is being demonstrated for the first time at IBC. Broadcast system designers can use the Broadcast Processing Engine IP core with the Broadcast Connectivity Kit to process video on a single chip. This enables designers to develop the complete video processing chain for many types of video applications. Xilinx has standardized the input and output of each video block so customers can add their own IP, upgrade their IP or mix and match Xilinx video IP using the Xilinx Streaming Video Interface (XSVI). The Xilinx Broadcast Processing Engine supports existing and emerging standards including 3D TV and 4Kx2K Digital Cinema. The Broadcast Processing Engine will support up to 4Kx4K resolution in the video scaler at 12-bit color depth.
Xilinx Broadcast Targeted Design Platforms
Xilinx's newest Broadcast Connectivity Kit and Broadcast Processing Engine IP core are the latest elements of the company's Targeted Design Platform approach toward integrating hardware and software elements needed to quickly build systems and fully verify performance. In addition to kits and FPGAs, these platforms include IP blocks, demonstrations, design environments and reference designs, along with a base set of development boards and industry standard FPGA Mezzanine Cards (FMC).
For broadcast applications, the Targeted Design Platform approach simplifies the development of complete broadcast audio and video interface solutions, including triple rate SDI solutions with support for standard definition TV to 3D TV and beyond in a single programmable device. It also enables the earliest possible adoption of emerging standards, such as DisplayPort, rapidly replacing DVI (Digital Visual Interface) and new Ethernet AVB (Audio Video Bridging) technology that guarantees timing and bandwidth availability in IP networks. For more, please visit http://www.xilinx.com/esp/broadcast.htm.
Xilinx Spartan-6 FPGAs
Spartan-6 FPGAs are designed for cost-sensitive applications requiring high-speed connectivity and low-power operation with embedded serial transceivers, advanced power management, and proven 45-nanometer architecture. These devices provide a rich mix of integrated system features including memory controllers, digital signal processing, and PCIe(R) Endpoint block, as well as RoHS-compliant lead-free package options for developing 'greener' electronics products.