Analysis
Multitest’s UltraFlat Process Meets Requirements of High Parallel Vertical Probe Card Applications
Multitest announces that its UltraFlat process meets the requirements of high parallel vertical probe card applications. For applications such as DDR3 memory, the requirements for the flatness of boards at wafer-level testing become crucial. For optimizing MLO/MLC attachments and contact element interfaces, a better surface is needed. Additionally, flatter PCBs require less compliance from the probe interface and reduce interface wear.
LeveWith UltraFlat™, Multitest typically is able to comply with bow/twist requirements of 1.0 percent.
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