Analysis
UEI - IRIG-B Timing Generation and Synchronization Interfaces
United Electronic Industries (UEI) announced the release of the DNA- and DNR-IRIG-650 Timing Generation and Synchronization Boards. These boards are general purpose IRIG-B timing interfaces for systems designed around UEI’s popular PowerDNA Cubes and RACKtangle Chassis. The boards may be used to capture IRIG-B timing data when the IOM is slaved to an external master timing device and may also be configured as a master time keeper for the entire system. Accuracy is 1 PPM with stability of 1PPM per year over a temperature range of 0 to 50°C.
The IRIG-650 can be directly connected to UEI’s GPS interface board, providing power to the GPS unit and a 1PPS UTC sync pulse. A convenient multi-cable assembly that provides 4 BNC-terminated cables (IRIG IN, IRIG OUT, GPS IN, GPS OUT) and a 15-pin DB-15 connector in a single assembly for various IRIG, clock, and trigger signals is available as an option.
The DNA version of the board is designed for mounting in any of UEI’s popular 3- or 6-slot PowerDNA UEIPAC, UEISIM, and UEIModbus “Cubes”. The DNR version is designed for use with the 6- or 12-slot rack-mounted HalfRACK and RACKtangle chassis.
Software for the boards includes support for all popular operating systems such as Windows, Linux, QNX, VxWorks, and more. The IRIG-650 boards are also fully supported by Framework, UEI’s comprehensive, easy to use, API that supports all popular programming languages and DAQ applications, including LabVIEW, MATLAB/Simulink, DASYLab or any application supporting ActiveX, OPC or Modbus TCP control.