Analysis
GOEPEL electronic demonstrates IJTAG (IEEE P1687) support in SYSTEM CASCON
GOEPEL electronic introduces a prototype version of the Company’s JTAG/Boundary Scan software platform SYSTEM CASCON with integrated tools supporting the current version of the upcoming IEEE P1687 (IJTAG) standard. IEEE P1687 focuses on the standardisation of the access to and the documentation of the control of chip-embedded instruments, without limiting the number or type of instruments.
Comp“From our perspective, chip-embedded instruments, in particular in high-speed applications, hold enormous potential for a long-term solution to access problems encountered with conventional test instrumentation. IEEE P1687 is an important contributor to such solutions”, explains Heiko Ehrenberg, Director of North American Operations at GOEPEL Electronics in Austin, TX. “We have supported the IJTAG initiative from the very beginning and are now demonstrating our first prototype tools for the practical utilisation of IEEE P1687 concepts. Once IEEE P1687 is finalised and published, we will integrate these tools with our open ChipVORX technology for chip-embedded instrumentation. We see the biggest potential in complementary combinations of external and chip-embedded instruments, like already supported in our advanced hardware and software platforms SCANFLEX and SYSTEM CASCON, respectively.”
This special draft version of SYSTEM CASCON includes integrated prototypes of an ICL parser/compiler as well as a PDL executor. FPGA soft-macros are used as demonstration vehicle for chip-embedded instruments, with their instrument access interface described in ICL. The demonstration includes the parsing of ICL information and the subsequent control of the instrument through PDL sequences.
This special version of SYSTEM CASCON™ is a concept study and is currently available only for non-commercial research and development applications. A final version is planned for release close to the official publication of IEEE Std 1687.
SYSTEM CASCON™, a professional JTAG /Boundary Scan development environment developed by GOEPEL electronic, currently includes 45 completely integrated tools for in-system programming (ISP), test, debugging, and design validation.