Soitec supplying SOI substrates to CSMC for display and other applications

SOI is a cost-optimized technology increasing device performance and reliability, while lowering power consumption. These advantages are an excellent complement to consumer electronics markets, as well as continued expansion into worldwide markets for automotive, RF/wireless, high-voltage, power management, photonics, imaging, lighting and more.

“With this agreement, CSMC will use Soitec's wafers on several major SOI projects for High Voltage and CMOS technology. We believe the partnership with Soitec will help us to provide a more cost-effective solution to our customers,” said Filian Wu, VP of Analog Process Technology Development Center.

“As the world's leader in SOI substrates, we are very pleased to collaborate with CSMC and will support their plans to ramp up SOI based products,” said Paul Boudre, Chief Operating Officer (COO) of the Soitec Group. “Over the last two years, we have experienced a strong acceleration of interest in SOI substrates in China mainly by the majority of the largest local foundries and institutes. Today these development projects are moving to first production ramp up and we expect a significant growth of SOI based products in China in the coming years.”

CSMC is a leading pure-play specialty analog foundry in China providing fabless design houses and integrated device manufacturers with a wide range of manufacturing services. The company manufactures ICs and power discrete processes at production technology nodes ranging from 0.13 micron to 0.5 micron. CSMC ICs and power devices are utilized in a broad range of end market applications including consumer electronics, communications devices, personal computers and more.

Designers of chips for leading analog and mixed signal applications are increasingly choosing SOI in large part because it dielectrically isolates all the transistor devices from each other, thereby eliminating the danger of chip-killing “latch-up”. It also minimizes current leakage, thereby saving energy at high operating temperatures. And, it enables very compact design, taking 40% less space than traditional pn-isolation technologies. For digital CMOS applications, SOI increases performance by up to 30% and decreases power consumption by up to 50%.