Real Intent Delivers Complete Constraint Management Solutions

The PureTime Exceptions solution offers formal glitch-aware verification of set_false_path, and set_multicycle_path timing exceptions to prevent faulty circuits and avoid expensive re-spins. PureTime Constraints and Exceptions solutions support RTL as well as net-list level designs. The PureTime product family, best in its class, offers comprehensive constraint management solution in the market.

PureTime 3.5 includes many new capabilities, can be easily integrated with Real Intent’s other products, and plugs into standard EDA flows. Features include:

* Equivalency checking between two constraint scenarios of the same design
* Coverage analysis of single as well as multi-mode designs
* Template generation including clock domain crossing false paths
* Additional smart checks to further improve quality

“PureTime 3.5 is a major landmark in Real Intent’s path to deliver a complete suite of tools to enhance verification productivity. The timing constraints spec has grown rapidly in proportion to the complexity of the massive SOCs being put together today. Ensuring the consistency and completeness of the constraints spec is a major challenge and also integral to failure-free design. PureTime 3.5 is Real Intent’s platform to deliver full-featured support for automated constraint management at and across RTL and gate-level design descriptions. As with all Real Intent products, the focus of PureTime 3.5 is on providing ease of use, quality performance and debug experience,” commented Pranav Ashar, Chief Technology Officer of Real Intent.