NXP Semiconductors Announced High Speed Converter Interoperability / Interworking with Altera FPGAs

NXP Semiconductors has announced that its CGV™ series of JESD204A-compliant data converters are now interoperable with Altera Corporation’s Stratix IV GX and Arria II GX FPGA families, and will also be interoperable in the future with the Cyclone IV GX FPGA family. Assured interoperability and interworking between programmable logic devices and high-speed converters is a critical acceptance criterion for equipment designers, because it eliminates risk and cost associated with project schedules.

The new JESD204A-compliant converters from NXP are suitable for cellular base stations and other wireless communication infrastructure equipment, as well as medical, instrumentation and military/aerospace applications. NXP offers ADC and DAC evaluation boards that include the Altera HSMC interface for easy connection to Altera FPGA evaluation boards allowing rapid demonstration of device interoperability. The NXP and Altera evaluation boards are available to qualified OEMs worldwide. NXP’s JESD204A ADC evaluation board based on the ADC1413D will be previewed during the Mobile World Congress 2010 show in Barcelona, Spain, February 15-18.

“NXP Semiconductors is pleased to extend this assured interoperability to our CGV customers, many of whom are interested in using the latest Altera FPGAs in their system designs”, said Maury Wood, senior director and product line manager, high speed converters, NXP Semiconductors. “With the proven interoperability of companion JESD204A IP blocks available from Altera, manufacturers can get to market quickly and cost effectively with the supply chain benefits of industry-standard architectures”.

“Altera is looking forward to participating in equipment design developments with NXP‘s CGV data converters, where the design engineer will be assured of seamless interoperability with our industry-leading FPGA families including Stratix IV GX, Arria II GX and Cyclone IV GX with integrated transceivers”, said Arun Iyengar, senior director of Altera‘s communications and broadcast business units. “This combination of NXP‘s JESD204A-compliant data converters and Altera's FPGAs will provide designers of wireless base stations and remote radio heads a high degree of flexibility and scalability, while enabling ease-of-use and cost reduction”.

CGV™(Convertisseur Grande Vitesse) designates NXP‘s compliant, superset implementation of the JEDEC JESD204A interface standard, with enhanced rate (4.0 Gbps typical), enhanced reach (100 cm typical), enhanced features (multiple DAC synchronization) and assured FPGA interoperability.

Specifically, NXP offers enhancements in terms of transceiver rate (up to 4.0 Gbps versus the standard rate of 3.125 Gbps, a 28% increase), and transmitter reach (up to 100 cm versus the standard reach of 20 cm, a 400% increase). The enhanced CGV features include Multi Device Synchronization (MDS) for the DAC1408D series of D/A Converters, which is not specified, but informatively discussed in the JEDEC specification. NXP has implemented this optional feature to enable LTE MIMO base station and other advanced multi-channel applications. NXP‘s implementation of MDS enables up to sixteen DACs data streams to be sample synchronized and phase coherent.