Chipsbank Adopts Cadence Incisive Xtreme III System to Boost SoC Verification Performance

Chipsbank is a leading provider of chips targeting applications areas such as digital audio/video processing, mobile storage, network communications and consumer electronics. The deployment of the Incisive Xtreme III system, as well as Cadence Incisive Enterprise Simulator, enabled Chipsbank engineers to accelerate their full-chip SoC verification at the register-transfer level (RTL) up to 500 times.

“We saw significant performance improvement after adopting Cadence Xtreme III—it speeds up the verification time over 500 times,” said Henry Zhang, CEO of Chipsbank. “We are also impressed with its usability and debugging capability, which help greatly shorten the verification cycle of our chips for the highly demanding consumer market. We are looking forward to collaborating with Cadence on future projects, including 65-nanometer implementation and design services.”

The Cadence Incisive Xtreme series of high-performance, high-capacity accelerators/emulators speeds the functional verification of designs at the behavioral, RTL and gate levels. Designed for multi-user, multi-site and multi-purpose systems, the Xtreme series integrates with the Incisive simulation environment to perform advanced verification planning and drive coverage-based, metric-driven verification closure. It also provides advanced debugging capabilities and eases adoption through instant “hot swap” among simulation, acceleration and emulation.

“Chipsbank’s experience with Xtreme III is a perfect example of how Cadence hardware-based solutions can help companies significantly reduce the development cycle in the highly competitive consumer market today,” said James Liu, general manager of China and Hong Kong at Cadence. “We are honored to see our customers like Chipsbank gaining competitive advantages with our industry-leading technology solutions.”