Analysis
Altera's Stratix IV GX FPGAs Deliver for Sumitomo Electric Industries' LDPC System
Altera has announced that Sumitomo Electric Industries is using its 40-nm Stratix IV GX FPGAs in a low-density parity-check (LDPC) high-speed measurement system that verifies the forward error correction (FEC) code for high-speed digital signal processing.
SumiAltera's Stratix IV GX FPGA provides us with a cost-effective, single-chip solution that delivers best-in-class performance and data rate speeds, allowing us to realize over 100‑Gbps performance in our LDPC system, said Mr. Takashi Maehata, assistant general manager, transmission system department, information and communication laboratories, Sumitomo Electric Industries. Obtaining this level of performance would not have been possible without Stratix IV GX FPGAs and their integrated 8.5‑Gbps transceivers. As a result of using Altera's Stratix IV GX FPGAs, our LDPC system achieves a throughput of 132-Gbps encoding and 24.48-Gbps decoding.
Altera® Stratix IV GX FPGAs and Quartus® II design software provide Sumitomo with a seamless development environment from algorithm to automatic HDL generation. The Stratix IV GX FPGA-based LDPC system interfaces with a multi‑Gigabit analog/digital converter (ADC) and features a Nios® II embedded processor. The embedded processor operates a TCP/IP protocol stack and facilitates the LDPC encoder and decoder. The system's circuits were developed using the Quartus II software and the DSP Builder and SOPC Builder tools.
Luanne Schirrmeister, senior director of component product marketing at Altera, stated, Today's leading-edge, data-intensive systems are increasing the demand for high-bandwidth devices that are capable of rapidly processing large amounts of data. Our 40‑nm Stratix IV FPGAs continue to push the technology envelope in terms of performance and data-rate speeds, allowing companies like Sumitomo to develop advanced systems that previously were not possible.