Analysis
Altera's Stratix IV GT FPGA Successfully Passes Ethernet Alliance's HSE Interoperability Test Targeting 100-Gigabit Ethernet Systems
Altera announced it successfully passed the first Ethernet Alliance® Higher Speed Ethernet (HSE) subcommittee interoperability event tests targeting products designed to support 100-Gigabit Ethernet (100GbE) systems. Passing the interoperability tests validates the performance of Altera's industry-leading transceiver technology featured in its Stratix® IV GT FPGAs and demonstrates to equipment manufacturers a low-risk solution that can be used in the deployment of 40GbE/100GbE systems.
AlteStratix IV GT FPGAs provide customers a low-power, hardware-validated solution that is IEEE Std. 802.3ba™-2010 compliant. The FPGA is a single-chip, fully functional solution that includes a 100GbE MAC and PCS intellectual property (IP) with standard XLAUI- and CAUI-compliant interfaces. The 100G Development Kit, Stratix IV GT Edition enables a thorough evaluation of 100GbE designs.
“The next generation of high-speed, high-performance computing applications and technologies is driving the industry's migration to 40GbE and 100GbE systems,” said Luanne Schirrmeister, senior director of component product marketing at Altera. “Using our Stratix IV GT FPGAs in high-bandwidth systems provides equipment manufacturers a high-performance, low-risk, single-chip solution that can be implemented with complete confidence.”
Stratix IV GT FPGAs are optimized specifically for the latest generation of 40G and 100G applications used in communications systems, high-end test equipment and military communications systems. Stratix IV GT FPGAs deliver breakthrough levels of system bandwidth and power efficiency for high-end applications with up to 48 integrated transceivers, 24 of which operate up to 11.3 Gbps. Stratix IV GT FPGAs feature up to 530K logic elements (LEs), 20.7-Mbits internal RAM and 1,024 18x18 multipliers.