Altera Demonstrates Solutions for Enabling OTN Systems Beyond 100G at OFC 2013

Altera is enabling the industry’s evolution beyond 100G by delivering solutions not possible in ASSPs with increased levels of performance, integration and flexibility. Altera’scomprehensive portfolio of OTN, Ethernet and Interlaken IP and the industry’s highest performance 28 nm Stratix V GT FPGAs will be on display in the Altera booth #3357. Altera technical experts will showcase the company’s latest OTN-based solutions and spotlight how the company is addressing the complex issues associated with applications beyond 100G, including 400-Gbps Ethernet and 500-Gbps Interlaken.



What: Optical Fiber Communication Conference and Exposition (OFC) and the National Fiber Optic Engineers Conference (NFOEC)



When: Tuesday, March 19, to Thursday, March 21, 2013



Where: Booth #3357, Anaheim Convention Center, Anaheim, Calif.



Technologies showcasing Altera solutions shaping the future of OTN include:



Industry leading OTN IP Solutions



-A 100G 2-stage ODUMux architecture which provides a hybrid OTN/packet switching solution in a single FPGA for Packet Optical Support Systems. Altera will be demonstrating industry-leading OTN muxing capabilities and will showcase architectures beyond 100G.



Stratix V GT FPGA Interoperability with CFP2 Optical Modules



-This demonstration will showcase the interoperability of a Stratix V GT FPGA with Finisar CFP2 modules. CFP2 interfaces allow equipment providers to design systems with up to 2.5X the density and 50 percent the power per 100 Gbps port compared to previous generation designs. Integrating Stratix V GT FPGAs with CPF2 optical modules enable developers of transmission and networking applications to significantly scale up bandwidth without increasing power or rack space.



OTN Partial Reconfiguration Using Stratix V GT FPGAs



-This demonstration shows client ports being partially reconfigured in a Stratix V GT FPGA in order to support multiple standards without impacting traffic on other ports in the FPGA. Using partial reconfiguration allows developers to reduce the overall costs, power and board space of their OTN solutions.



High-speed Transceiver and Backplane Demonstration



-This demonstration provides a complete link for routing signals across high-speed backplanes located within a rack and then processing/aggregating data within the FPGA fabric before sending over 28 Gbps transceiver links connected to optical engines. The demonstrations showcases the Stratix V GT FPGA’s industry-leading signal integrity capabilities and transceiver technology driving high-speed electrical interconnect in optical transport systems.