Accelerate AI RISC-V System-on-Chip development

The partnership supports the interoperability between Semidynamics' Atrevido and Avispado 64-bit RISC-V processor IP cores and Arteris’ Ncore cache coherent network-on-chip (NoC) system IP. The combined solution delivers interoperability to speed up the development of AI/ML and HPC designs.

"For markets like machine learning, key-value stores and recommendation systems, we optimise our customisable RISC-V processors and supporting technologies, such as Vector Units, Tensors Units and Gazzillion, to deal with the computing of highly sparse data, with long memory latencies, and high-bandwidth memory systems," said Roger Espasa, CEO of Semidynamics. "Efficient data transport within our cores and between chips and chiplets is vital for overall system performance. Partnering to pre-integrate with Arteris' Ncore cache coherent technology will result in accelerated project schedules for our mutual customers."

"Our goal is to support our customers’ choices on processor IP while providing the SoC connectivity backbone for the emerging RISC-V ecosystem and its use in combination with other processor architectures," said Michal Siwinski, CMO at Arteris. "Our collaboration with Semidynamics supports our mission to catalyse SoC innovation so our shared customers can focus on dreaming up what comes next and creating leading-edge products, including those supporting the rapid evolution of AI."

The partnership currently focuses on a demonstrator design integrating a Semidynamics’ four-core RISC-V cluster using Arteris’ Ncore cache coherent NoC technology. This collaboration is expected to be available for customer demonstrations in Q1 2024.