NXP's High Speed Converters are Compliant to New JEDEC Interface Standards

Underscoring its commitment to the JEDEC interface standard, NXP will demonstrate a JESD204A-compliant data converter in the NXP booth at the IEEE Microwave Theory and Techniques Society (MTT-S) / International Microwave Symposium (IMS) Conference in Boston next week. The demonstration will showcase the interoperability of NXP’s DAC1408D650, a dual-channel, four JESD204A data lane, 650 MSample/sec DAC with a Xilinx Virtex-5 FPGA.

Fully interoperable with cost-effective FPGAs from Lattice, Altera and Xilinx, NXP’s JEDEC JESD204A ADCs and DACs deliver outstanding high input frequency linearity performance. Compared with conventional parallel digital interfaces, the new JEDEC serial digital interface gives high-speed data acquisition engineers a compelling design-in option. The new JEDEC JESD204A interface typically utilizes six interconnect signals for a 14-bit dual-channel data converter, nearly an 80% reduction compared to a parallel interface which typically consumes 28 interconnect signals.

NXP's new family of JESD204A-compliant converters promises to change the economics of high-speed signal processing system design. The benefits of a much smaller PCB footprint and 25% fewer board layers results in cost savings that often dwarf the price of the converters themselves, said John Croteau, VP Analog and Mixed-Signal Products, NXP Semiconductors. With proven interoperability of companion JESD204A IP blocks available from all major FPGA vendors, manufacturers can get to market quickly and cost effectively with the cost and supply chain benefits of using industry-standard architectures.

The JEDEC JESD204A interface also provides higher interconnect signal integrity, single-bit error detection, and enables system performance scalability without PCB design changes. These technical merits render significant commercial advantages for system designers including lower system cost, increased system reliability, higher functional integration, faster time-to-market and reduced design complexity. Targeted at cellular basestations, medical imaging equipment, high-speed instrumentation, video broadcast equipment, and military data acquisition applications, the new data converters highlight NXP’s renewed commitment to the high-speed data converter market.

Lattice is delighted to be working with NXP to ensure seamless interoperability between our ECP3 FPGAs and NXP's JESD204A data converters. Combining high value, low power FPGAs with high performance data converters offers our mutual wireless infrastructure customers unprecedented savings in cost and power consumption without sacrificing throughput and performance, said Shakeel Peera, director of strategic marketing for High-Density FPGAs, Lattice Semiconductor.

NXP’s new portfolio of data converters deliver outstanding dynamic performance at highly competitive power consumption levels, an important consideration as equipment designers strive for higher energy efficiency to reduce their customer’s total cost of ownership. Due to strength in small-signal RF products, RF power amplifiers and high-speed data converters, NXP is uniquely able to present a complete signal chain product portfolio - from antenna to digital baseband processor - for wireless communications infrastructure OEMs engaged in W-CDMA, LTE, WiMAX and multi-carrier GSM/EDGE system designs. Beyond this focus market segment, NXP’s new high-speed 16-bit data converters are targeted to a broad range of industrial equipment designs which require high linearity and low noise figures of merit.