Software Supported Optimisation Of D/A Converters

This can lead to the need for an additional, external D/A converter, or choosing D/A converters with a higher resolution than is actually needed, increasing the total system costs and FIT rates for safety critical systems.



In this design note a solution is shown to optimise many characteristics of any D/A converter (internal or external) by realising a multi-bit sigma delta modulator in software and applying linearisation, improving THD (linearity), SNR and ENOB.



Effects on output signals of standard D/A converters



Standard D/A converters are not linear; their ideal output value is not 100% met. This value is specified in the datasheets as the INL (integral non linearity). The INL is the difference between this ideal, the expected output and the real output, expressed as a number of LSBs.





Figure 1: INL measurement of a 12-bit D/A converter



Some datasheets contain only a worst case INL value, others contain a plot of the INL depending on the digital code. Figure 1 shows a INL measurement of a 12-bit D/A converter.



These non-linearities have different effects. The most obvious is that when a D/A converter is used to generate static DC voltages it manifests itself as slightly wrong voltages.



When dynamic signals are generated with the D/A converter (such as a constant sine wave) the non-linearity leads to harmonic distortions.





Figure 2: 12-bit D/A converter spectrum and time domain signal. Signal = 3-bit sinewave (scale factor 1/512)



Figure 2 shows a sine wave signal and spectrum of a sine wave with 3-bit resolution generated by a 12-bit D/A converter. The harmonic distortion is in this case even higher due to the decreased resolution, which can also easily be seen on the time domain signal.





Figure 3: Using a look-up table to improve INL



A standard approach to linearise D/A converters is to apply a look-up table before the D/A converter for linearisation (Figure 3). This approach allows only compensation in 1 LSB steps which will linearise a converter in an ideal case to ± 0.5 LSB INL only.



Solution



The basic Idea for an improved solution is to use the concept of sigma delta modulation to decrease the INL even more, by allowing compensation with a better granularity than 1 LSB.



This solution is shown in Figure 4. A second order multi-bit sigma delta modulator (SDM) is put in front of the D/A converter. In the feedback path of the SDM a look-up table (LUT) is used to translate the output values of the quantizer to the real actual output voltages. This allows the sigma delta modulator to ‘see’ the actual error and compensate for it efficiently.





Figure 4: Second order multi-bit sigma delta converter with improved linearisation



The major advantage is that linearisation is now possible in smaller steps than 1 LSB. Furthermore the dynamic range (bit width) can be increased, by allowing input samples with higher bit widths on the input of the sigma delta converter.



This solution was implemented in software based on an MSP430FG4618 (DAC12) and measurements were made. The input sample width is 16-bit, the output width is still 12-bit (DAC12):



Figure 5 shows the second harmonic is now at -99.19 dB (before: -69.7 dB). This equals a 29.49 dB improvement. The sine wave is also much smoother.





Figure 5: Time domain signal and spectrum of a 3-bit amplitude sinewave SDM based linearised



Implementation



This solution can be easily implemented in software, without any special requirements on the hardware side. No multiplication is needed, only addition/subtraction and a look-up table (indirect addressing).



A short software implementation for a 12-bit output D/A converter is shown in Table 1. The 12-bit D/A converter performance is boosted to the performance of a 16-bit converter.





Table 1: Software implementation of multi-bit SDM modulator with linearisation



This code has to be executed for each sample. INPUTSAMPLE_16Bit is a 16-bit input sample value, OUTPUTSAMPLE_12Bit a 12-bit output sample value and LUT a Lookup table with 4096 entries. All variables are 16-bit width.



Author profile: Kai Gossner is Field Application Engineer for Texas Instruments. He received the Dipl.-Inf. (FH) degree in applied computer science with specialisation in realtime systems and robotics from university of Applied Sciences in Gelsenkirchen, Germany. He has 14 years of experience in the fields of embedded hard- and software development, low power sensors, photonics, analog and digital signal processing, system design, algorithms development and RF technology.