Intersil’s Single and Dual Channel 14-Bit ADCs Are Industry’s Fastest with JESD204B Serial Outputs

The ISLA224S/ISLA214S50 series represent the first ADCs now in production with JESD204B serial outputs. The integrated JESD204B-compatible transmitter offers data rates up to 4.375Gbps per lane, requiring only two lanes to support either the dual channel 14-bit 250Msps converter (one lane per channel) or the single channel 14-bit 500Msps device. An optional third lane is included in the transmitter to support the maximum sampling rate while operating the serial lanes at less than 3.125Gbps, providing backwards compatibility with the JESD204A standard to support lower cost FPGAs. The JESD204B transmitter also provides deterministic latency between the ADC sample clock and the serialized data stream. This meets the synchronization requirements of multi-channel and I/Q communications systems.

Power consumption for the ISLA224S25 is just 980mW at 250Msps, compared with 1000mW or higher among competitive serial devices with lower sample rates. For the ISLA214S50, power consumption is just 1050mW compared with 2500mW for competing products.

The ADCs also feature a compact footprint of just 7 mm x 7 mm. They are built using Intersil’s FemtoChargeTM technology on a standard CMOS process with the proven core from Intersil’s popular ISLA224Pxx series, which delivers best-in-class signal-to-noise ratio (SNR).

The ISLA224S and ISLA214S50 are optimal for high performance data acquisition and broadband communications systems. They are also ideal design choices for high speed medical imaging systems, microwave receivers and radar or satellite antenna array processing, and other high speed applications. Also, the integrated 8b/10b serializer eliminates the need for an external serializing device, simplifying the design of serial-data communications systems.

Complete Evaluation Kit Ready

Intersil is offering an evaluation kit for use with these new ADCs. It includes a modular hardware design, including a proprietary motherboard and interchangeable daughter cards, and Java-based software. The motherboard’s FPGA is available as a reference design for a SERDES receiver, and the daughter cards are compliant with the VITA 57 FPGA Mezzanine Card (FMC) standard, allowing it to also operate with FMC host cards such as the ML-605 from Xilinx.

Features and Benefits

JESD204B high speed serial outputs reduce cost, size, and complexity Deterministic latency eliminates synchronization challenges Multi-ADC support simplifies multi-channel designs For an input frequency (FIN) of 105MHz, the ISLA224S25 offers SNR of 72.9dBFS at a sample rate of 250Msps, while the ISLA214S50 provides 72.9dBFS at 500Msps (nearly 3dB higher than its nearest competitor) Low clock jitter improves signal-to-noise ratios at high input frequencies Lower power consumption simplifies thermal and power supply design, and eliminates the need for costly heat sinks Low power consumption also enables more channels within a fixed power budget

Pricing and Availability

The ISLA224S/214S50 ADCs come in 48-pin QFN packages. Prices in 1,000-piece quantities are $79.85 each for the ISLA224S20, $109.79 each for the ISLA224S25, and $185.00 each for the ISL214S50.