AMD releases its new Versal Series Gen 2 devices

AMD has expanded its Versal adaptive SoC range, introducing the Versal AI Edge Series Gen 2 and Versal Prime Series Gen 2. These devices integrate preprocessing, AI inference, and postprocessing capabilities, enabling comprehensive acceleration of AI-centric embedded systems. Building upon their predecessors, the second-generation devices boast enhancements such as AI Engines projected to provide a tripling in TOPs-per-watt efficiency over the original Versal AI Edge Series. Furthermore, the integration of high-performance Arm CPUs is expected to yield a tenfold increase in scalar compute capabilities compared to the initial offerings in the Versal AI Edge and Prime series.

“The demand for AI-enabled embedded applications is exploding and driving the need for single-chip solutions for the most efficient end-to-end acceleration within the power and area constraints of embedded systems,” said Salil Raje, senior vice president and general manager, Adaptive and Embedded Computing Group, AMD. “Backed by over 40 years of adaptive computing leadership, these latest generation Versal devices bring together multiple compute engines on a single architecture offering high compute efficiency and performance - with scalability from the low-end to high-end.”

Versal AI Edge Series Gen 2

The AMD Versal AI Edge Series Gen 2 adaptive SoCs offer comprehensive acceleration for AI-powered embedded systems within a singular device, emphasising advanced safety and security. These devices merge intricate programmable logic with a newly enhanced processing system comprising integrated Arm CPUs and brand-new AI Engines. This integration facilitates the execution of all three critical stages of computation in embedded AI applications: preprocessing, AI inference, and postprocessing. This is AMD’s answer to the overhead constraints that traditional multi-chip solutions cause, creating a single-chip heterogeneous processing solution with programmable logic.

The Versal AI Edge Series Gen 2 adaptive SoCs are engineered to cater to a wide array of embedded markets, particularly those demanding high-security, high-reliability, extended-lifecycle, and safety-critical applications. These SoCs are built to satisfy ASIL D/SIL 3 operating criteria and adhere to a multitude of other safety and security regulations.

Highlights:

• Programmable logic for real-time processing and flexibility
• 3x TOPs-per-watt compared to previous generation
• 10x more CPU-based scalar computing
• DDR5/LPDDR5X memory controller support
• 100k DMIPs at ASIL D/SIL 3 operation
• End-to-end ASIL D/SIL 3 operation
• DDR inline crypto and application security unit for run-time security
• Secure boot and device configuration
• 1Gpix/s image signal processing throughput per tile
• HEVC & AVC encode & decode
• Horizontal mirroring, tone mapping, and more supported
• Integrated 4-core Arm Mali-G78AE GP

Versal Prime Series Gen 2

The AMD Versal Prime Series Gen 2 adaptive SoCs blend AMD's programmable logic with an upgraded high-performance processing system featuring integrated Arm CPUs, delivering a scalar compute capacity up to ten times greater than current Versal or Zynq adaptive SoCs. This dynamic duo of adaptable, real-time sensor processing and the capacity for complex embedded computing tasks enables designers to optimise system performance, eliminating the need for more cumbersome multi-chip configurations.

The Versal Prime Series Gen 2 devices are designed for a diverse spectrum of applications such as 8K video processing, avionics, and beyond. These devices enhance their programmable logic and processing system with a new hardened IP. This update introduces robust video encoding and decoding capabilities, DDR5/LPDDR5X memory controllers, and incorporates an integrated Arm Mali-G78AE GPU, broadening their applicability and performance in demanding tasks.

These SoCs are also designed to meet SIL 3 operating requirements and are compliant with numerous other safety and security standards.

Highlights

• 10x scalar compute for complex workloads
• 200k DMIPs with 8x Arm Cortex-A78AE processors
• 1MB L3 cache per two-core cluster and 4MB shared LLC
• 10x Arm Cortex-R52 processors featuring L1 cache, TCM, 2 MB OCM
• HEVC & AVC up to 4K60, 4:4:4, 12-bit video encode & decode
• DDR5/LPDDR5X memory controllers and programmable I/O
• 100G multi-rate Ethernet and PCIe Gen5 IP
• 4-core Arm Mali-G78AE GPU integrated
• 100k DMIPs of compute at SIL 3 operation
• End-to-end SIL 3 operation
• DDR inline crypto and application security unit for run-time security
• Secure boot and device configuration